intel / msr-tools

DISCONTINUATION OF PROJECT.

This project will no longer be maintained by Intel.

Intel has ceased development and contributions including, but not limited to, maintenance, bug fixes, new releases, or updates, to this project.

Intel no longer accepts patches to this project.

If you have an ongoing need to use this project, are interested in independently developing it, or would like to maintain patches for the open source software community, please create your own fork of this project.

msr-tools's Issues

msr-tools silently accepts incorrect register

A Debian user reported the following error: running "rdmsr MSR_K8_TOP_MEM2" doesn't return an error. Instead, it returned "0" for him, and on my system it returns "ff". Both of these could be plausible answers.

Instead, rdmsr should probably return an error when strtoul() returns MSR 0. According to an MSR data sheet that I found at http://www.cs.inf.ethz.ch/stricker/lab/doc/intel-part4.pdf , MSR 0 seems to only be available on original Pentium chips. Given that it's been almost 20 years since Pentium II was released, I'm hoping that it's safe to assume that a user asking for MSR 0 is an error. Likewise, similar behavior should probabably be done for wrmsr - returning an error when attempting to write to MSR 0.

Here's the original Debian bug report:
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=790075

wrmsr has no effect

wrmsr has no effect as I see

# modprobe msr
# rdmsr -p0 0x1a4
0
# wrmsr -p0 0x1a4 1
# rdmsr -p0 0x1a4
0
#

CPU is reported as

# lscpu
Architecture:        x86_64
CPU op-mode(s):      32-bit, 64-bit
Byte Order:          Little Endian
CPU(s):              2
On-line CPU(s) list: 0,1
Thread(s) per core:  1
Core(s) per socket:  1
Socket(s):           2
NUMA node(s):        1
Vendor ID:           GenuineIntel
CPU family:          6
Model:               79
Model name:          Intel(R) Xeon(R) CPU E5-2620 v4 @ 2.10GHz
Stepping:            1
CPU MHz:             2097.571
BogoMIPS:            4195.14
Hypervisor vendor:   VMware
Virtualization type: full
L1d cache:           32K
L1i cache:           32K
L2 cache:            256K
L3 cache:            20480K
NUMA node0 CPU(s):   0,1
Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts mmx fxsr sse sse2 ss syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts nopl xtopology tsc_reliable nonstop_tsc cpuid aperfmperf pni pclmulqdq ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx hypervisor lahf_lm 3dnowprefetch epb pti dtherm ida arat pln pts

Any thought?

List all msr addresses

I want to get the values for L1, L2, L3 cache miss counters, Is that possible to do so using readmsr? If yes where i can find list of addresses of all register i can get get value for?

can not read register 266

[msr-tools]# ./rdmsr -a 266
rdmsr: CPU 0 cannot read MSR 0x0000010a
[msr-tools]# strace ./rdmsr -a 266
execve("./rdmsr", ["./rdmsr", "-a", "266"], 0x7fff41bfb840 /* 43 vars /) = 0
brk(NULL) = 0x14f9000
arch_prctl(0x3001 / ARCH_??? /, 0x7ffd33c2f870) = -1 EINVAL (Invalid argument)
access("/etc/ld.so.preload", R_OK) = -1 ENOENT (No such file or directory)
openat(AT_FDCWD, "/etc/ld.so.cache", O_RDONLY|O_CLOEXEC) = 3
fstat(3, {st_mode=S_IFREG|0644, st_size=43690, ...}) = 0
mmap(NULL, 43690, PROT_READ, MAP_PRIVATE, 3, 0) = 0x7f8d300bf000
close(3) = 0
openat(AT_FDCWD, "/lib64/libc.so.6", O_RDONLY|O_CLOEXEC) = 3
read(3, "\177ELF\2\1\1\3\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0\2009\2\0\0\0\0\0"..., 832) = 832
fstat(3, {st_mode=S_IFREG|0755, st_size=5993088, ...}) = 0
mmap(NULL, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7f8d300bd000
mmap(NULL, 3942432, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f8d2fadf000
mprotect(0x7f8d2fc98000, 2097152, PROT_NONE) = 0
mmap(0x7f8d2fe98000, 24576, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x1b9000) = 0x7f8d2fe98000
mmap(0x7f8d2fe9e000, 14368, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOUS, -1, 0) = 0x7f8d2fe9e000
close(3) = 0
arch_prctl(ARCH_SET_FS, 0x7f8d300be500) = 0
mprotect(0x7f8d2fe98000, 16384, PROT_READ) = 0
mprotect(0x602000, 4096, PROT_READ) = 0
mprotect(0x7f8d300ca000, 4096, PROT_READ) = 0
munmap(0x7f8d300bf000, 43690) = 0
openat(AT_FDCWD, "/dev/cpu", O_RDONLY|O_NONBLOCK|O_CLOEXEC|O_DIRECTORY) = 3
fstat(3, {st_mode=S_IFDIR|0755, st_size=540, ...}) = 0
brk(NULL) = 0x14f9000
brk(0x151a000) = 0x151a000
brk(NULL) = 0x151a000
getdents64(3, / 27 entries /, 32768) = 656
getdents64(3, / 0 entries */, 32768) = 0
close(3) = 0
openat(AT_FDCWD, "/dev/cpu/0/msr", O_RDONLY) = 3
pread64(3, 0x7ffd33c2f798, 8, 266) = -1 EIO (Input/output error)
write(2, "rdmsr: CPU 0 cannot read MSR 0x0"..., 40rdmsr: CPU 0 cannot read MSR 0x0000010a
) = 40
exit_group(4) = ?
+++ exited with 4 +++
[msr-tools]# lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 24
On-line CPU(s) list: 0-23
Thread(s) per core: 2
Core(s) per socket: 6
Socket(s): 2
NUMA node(s): 2
Vendor ID: GenuineIntel
CPU family: 6
Model: 45
Model name: Intel(R) Xeon(R) CPU E5-2620 0 @ 2.00GHz
Stepping: 7
CPU MHz: 1196.900
CPU max MHz: 2500.0000
CPU min MHz: 1200.0000
BogoMIPS: 3989.75
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 15360K
NUMA node0 CPU(s): 0-5,12-17
NUMA node1 CPU(s): 6-11,18-23
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx lahf_lm epb pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid xsaveopt dtherm ida arat pln pts flush_l1d
[msr-tools]# uname -r
4.18.0-147.el8_1.x86_64

Support for Android

Hello, wanted to know if it is ok to upstream a patch that allows usage of this tool on Android systems?

What is the license for this software?

Found bug in msr-tools 1.2

Unable to write to upper 32 bits of msr. Lower 32 bits are getting written properly