ivogeorg / tracing-arm-assembly

A short demo of tracing an ARM assembly program

Tracing the Execution of an ARM Assembly Program

A short demo of tracing an ARM assembly program.

1. C Program Compiled to ARM Cortex-M0 Assembly

You can see both programs side by side in the convenient Compiler Explorer with line-by-line highlights. Screenshot shown below.

2. Reading the ARM Instructions

A line-by-line reading of the instructions of the generated ARM code can be seen in the file instruction-reading.

2.1 ARM Cortex-M0 Instruction Set Documentation

1. Main page.
2. Programmer's Model.
3. Flags and Links to Detailed Descriptions.
4. Conditional Execution.

3. Tracing the Program State

3.1 Computer states

The assembly programmer's model for a computer is very simple: register bank, ALU, data memory, instruction memory, and stack. These are the elements that form the state of the computer as far as we are concerned.

By tracing the execution of the program, we will identify the computer state at three locations in the code:

1. After Line 17, before Line 18. Sketch.
2. After Line 9, before Line 10. Sketch.
3. After Line 28, before Line 29. Sketch.

A clean and empty sketch template.

3.2 Things to keep in mind

1. Execution starts with the first instruction of the main function (for compiled standalone C programs).
2. Instructions are stored in memory in consecutive words (this means that instructions are stored in consecutive word-aligned 4-byte memory slots, and their addresses differ by 4) and are executed in order, except after a branch. The Program Counter register pc holds the address of the currently decoded instruction. Use the program line numbers, converted to hexadecimal, as instruction addresses.
3. Upon branching, the Link Register lr is assigned the address of the instruction to be executed when returning from the branch. This is called the return address. The instruction branch with exchange bx swaps the contents of lr and pc, returning execution to this instruction.
4. The stack grows down from higher to lower addresses. The top of the stack is its lowest address. This address is stored in the Stack Pointer register sp. At the start of the program, sp holds an invalid address above the top.
5. Conditional statements and loops are implemented with the use of status bits N, Z, C, and V (aka condition code flags). They are the 4 high bits of the Application Program Status Register (APSR) (aka CPSR). They are set and cleared automatically by the processor.
6. Comparison instructions always update the status bits. Other instructions do not, unless they have an S appended to the opcode.

3.3 Video demo

TODO