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Diagrams & code for my home-built Ben Eater inspired 8-bit CPU

C++ 44.53% Assembly 12.90% Makefile 0.66% Lex 1.16% C 36.75% Yacc 4.00%

jcpu's Introduction

jCPU: My homebuilt 8-bit Ben Eater inspired CPU
===============================================

A few months ago, inspired by Ben Eater's wonderful Youtube video series, I built my very
own 8-bit CPU from scratch, on breadboards using basic digital logic components (gates, 
latches, EEPROMs).

I have documented the entire adventure on my Youtube channel:
https://www.youtube.com/channel/UCH09NwwJsfThwLKvc6kxl4Q

This repository contains the supporting software for this project. It is divided into a
number of sub-projects:

+ arduino/ contains the Arduino C++ code, which is used to program the various EEPROMs 
           used in the project.
---+  arduino/DigitalDisplay/ programs an EEPROM to display decimal digits, based on 
                              8-bit bainry input. See 
                              https://www.youtube.com/watch?v=b3iytSzYhSs
---+  arduino/Erase/ erases an entire EEPROM, resetting every byte to 0xFF
---+  arduino/Microcode/ programs microcode into the 4 EEPROMs, which make up the control
                         unit. See https://www.youtube.com/watch?v=CE615IDVVNA and
                         https://www.youtube.com/watch?v=O_mTxnFYLXE
---+  arduino/libraries/MyEEPROM/ support library to provide high-level EEPROM read- and
                                  write-functions. See
                                  https://www.youtube.com/watch?v=b3iytSzYhSs

+ assembler/ A very simple assembler, written in C, using UN*X lex and yacc, which can
             translate the assembly files in programs/ to machine code, suitable for the
             8-bit CPU. See https://www.youtube.com/watch?v=-_u6HhAb5mo&t=1509s

+ programs/ Contains several example programs in assembly for the 8-bit CPU. Some
            (primes.s and qsport.s) are hand-compiled from corresponding C-code. Others
            were written in assembly from scratch.

+ schematics/ generated PDF, and source .sch (gEDA schematics) files, for electrical
              schematics describing the various parts of the 8-bit CPU. Shown throughout
              the videos in the series.

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Program: powers.s

I've built a simulator of your breadboard CPU as a precursor to adding some real hardware for a hybrid solution, that is a part simulated, part real project. I have a problem with the powers.s program at https://github.com/jamesbates/jcpu/blob/master/programs/powers.s. The Fibonacci and multiplication tables run OK. Obviously, I have considered that I may have made a mistake in emulating your solution but it does look like there is a problem in that powers.s gets stuck in loop0 if the contents of [#0] are greater than 1. I couldn't follow all the logic so I rewrote the program from scratch hoping to be able to recreate the problem but where I could understand how it was supposed to be working. I failed in that the program I constructed worked correctly so I could not reproduce the error. Is there a known problem with powers.s ?

This, incidentally, is the version I created and it works fine

; Ver 12.02.20232 power3_v03.s 
; Show all power series (n^1, n^2, n^3, ...) up to base 15. Limited to 255
; 
;
; core logic: 
; n^E = n^(E-1) * n = n^(E-1) + n^(E-1) .... + n^(E-1) [repeated n times]
; where n is the base and E is the exponent.
; That is, previous displayed power added to itself base-1 times
; gives new displayed power
; Increment exponent until result too big then start with next base.
; Increment base and repeat until > 15.
;
			.org 0
start:			data Rd, #1 
			sto [#0], Rd   	; ram[#0] base = 1  
;
newBase: 		lod Rd, [#0]	; base
			inc Rd		; base++
			sto [#0], Rd    ; base
			data Rb, #15    
			and Rd,Rb       ; test if base outside range 1 to 15 (0x0F)
			jz #start	; base > 15 goto start
			lod Ra, [#0] 	; RegA always holds last calculated power for 
                            		; current base. initial value = base			
;
newExp:			mov Rc, Ra	; last calculated power for current base to accum
			mov Rb, Ra      ; RegB is addend 
			lod Rd, [#0]    ; multiplier (initial value as base - 1 )
			dec Rd          ; multiplier--
;
innerAdd:   		add Rc, Rb	; add old power to self then base-1 more times 
			jc #newBase	; too big so start with next base
			dec Rd		; multiplier--
			jz #showPower   ; multiplier == zero. We have a new power to show 
		    	jmp #innerAdd   ; keep adding base to accum
;			
showPower:		mov Ra, Rc 	; loading to RegA shows it on display	
			jmp #newExp	; next exponent with current base.

RAM schematic

When SRAM ist addressed by DIP-switches oder MAR: why ist D0 of the bus/switch connected via the logic to A7 of SRAM an D7 of the bus to A0 of SRAM and not vice versa? Another question to the data-side of SRAM: why ist DQ7 of SRAM connected via the logic to D0 of the bus and not to D7? What do I misunderstand?

Alu schematics use obsolete chip

I have been trying to build the alu from schematic, the chips 74xxx382 alu function chips are considered obsolete and I was unable to find an equivalent chip, do you know of a production chip that can replace it?

jamesbates / jcpu Goto Github PK

jcpu's Introduction

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jcpu's Issues

Program: powers.s

RAM schematic

Alu schematics use obsolete chip

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