Use ezdma from kernel-space about ezdma

[jeremytrimble]

@gochit,

ezdma is designed for use from userspace only, and get_user_pages_fast() is intended only for userspace (process virtual) memory, so I'm not surprised that it's not working when being called from within the kernel.

I think you're on the right track with your code above (calling the dmaengine API directly from within the kernel), but as far as debugging your specific issue I'd have to know more context. The meanings of register values printed in dmesg are explained in the AXI DMA Documentation (PG021).

[ht-hieu]

@jeremytrimble ,

Thank you for your response, according to AXI DMA Documentation, DMA driver turned on 2 bits:

DMA channel halted. For Scatter / Gather Mode this bit gets set when DMACR.RS = 0 and DMA and 
scatter Gather (SG) operations have halted. For Direct Register mode (C_INCLUDE_SG = 0) this bit gets 
set when DMACR.RS = 0 and DMA operations have halted. There can be a lag of time between when 
DMACR.RS = 0 and when DMASR.Halted = 1

DMA Internal Error. Internal error occurs if the buffer length specified in the fetched descriptor
is set to 0. This error condition causes the AXI DMA to halt gracefully. The DMACR.RS bit is set 
to 0, and when the engine has completely shut down, the DMASR.Halted bit is set to 1.

I don't know why channel turned off and this error only occurs when I increase the speed to larger than thread hold (2Mbit/s). My code is very simple, it receives bytes from DMA and sends to another module in an infinity loop.

[jeremytrimble]

@gochit: You mentioned that you didn't know how the core's parameters were set when your FPGA image was built -- perhaps as you increase the size of your transfers you are exceeding the configured length of the transfer size register. When the upper bits of your transfer size are lost, the truncated result might be all zeros, which would cause the error you see.

In some versions of the xilinx AXI DMA driver, you can set the register length as a device tree parameter. Even if you don't know exactly how the AXI DMA's register length was configured in your FPGA image, you could always set the value in the device tree to something lower and it should still work, at the expense of using more descriptors than necessary.

[ht-hieu]

@jeremytrimble

I still don't know why this error occurs. When I can reduce the frequency of errors by increase buffer size which is mapped to DMA. When I increased writing speed, your driver got the same error.
BTW, I replaced DMA single with DMA coherent and the performance is much better, now I can ignore this error 😀