Comments (2)
I can't be sure but I've seen this sort of thing happen before if your AXI DMA core was configured with a "Width of Buffer Length" register that is too small.
Representing 32*1024
requires at least a 16 bit register. Going up to 64*1024
requires a 17-bit register, but if your AXI DMA was configured for 16 bits then the high-order bits will get truncated and DMA will just see a zero in the buffer length field of your descriptor and that will cause the DMA core to return an error (I think), or maybe just hang.
Have a look at: https://www.xilinx.com/support/documentation/ip_documentation/axi_dma/v7_1/pg021_axi_dma.pdf, page 76.
Hope this helps!
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That makes sense. I've actually already maximized my buffer length to 23 bits. My address width is 32 bits, all data widths are 32 bits and my max burst size is 256.
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