jkochanik / digitalsysdesign

For Class

Digital System Design

COURSE DESCRIPTION

The course focuses on digital system design, modeling, and synthesis using the VHSIC (Very High Speed Integrated Circuits) Hardware Description Language (VHDL). The course begins with a review of Boolean logic and binary arithmetic. Students then learn modeling and simulation of digital circuits using behavioral, dataflow, and structural modeling techniques, including the use of VHDL subprograms and operator overloading. This is followed by computer-aided synthesis and implementation, including finite state machines (FSM) and test bench design. Students will use commercial VHDL compilation, simulation, and synthesis tools to evaluate and test their designs. They will also participate in several laboratory sessions in which they develop and test hardware implementations using commercial FPGA evaluation boards.

LEARNING OBJECTIVES

After successful completion of this course, students will be able to

• Develop technical documentation of a complex digital system using hardware description language and schematic representations and to evaluate the correct function and performance based on simulations of the system.

• Apply VHDL entity/architecture modeling to represent component inputs and outputs and also internal signals, variables and operations.

• Develop VHDL models of systems using behavioral, structural, and dataflow concepts to describe the internal behavior and/or structure of the design.

• Efficiently model a complex digital system as a hierarchy of interconnected components, taking advantage of regularity and component re-use.

• Build VHDL models of complex digital circuits suitable for synthesis where the target platform is an FPGA or ASIC logic library, and understand the limitations of VHDL as a synthesis language and know which particular styles of VHDL coding lead to efficient solutions.

• Use VHDL to design complex synthesizable state machines using Mealy and/or Moore architectures.

• Write test vectors for a digital system and develop a VHDL test-bench to apply these vectors using file based input/output operations.

• Represent and document designs, perform simulations, and synthesize implementations using software tools provided by an FPGA vendor.