Drive a DC motor using a H-bridge circuit to vary the speed or torque of the motor using PWM signal with 16 different levels of duty cycle (levels are controlled from external switches).
Before the advent of Pulse Width Modulation (PWM), potentiometers were commonly used to regulate the speed of Direct Current (DC) motors. However, these potentiometers had three main drawbacks:
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Dynamic Range: The system could be adversely affected by leakage when the wiper was turned.
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High Sensitivity: Analog circuits are often extremely sensitive, reacting significantly to even minor changes.
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Corrosion: Rust can disrupt the signal entering the system or circuit, causing further complications.
People now started using digital circuits to handle Pulse Width Modulation (PWM). For what is altered, there will be the duty cycle, and as for the output, the speed will depend on the various levels depending on its voltage output, which will be affected depending on the duty cycle.
1. Buttons🔘
There will be 2 buttons of which will be used in the CoolRunner-II CPLD to change the PWM of the DC motor. One of the buttons will allow the speed to accelerate, and the other will reset the system.
2. Bistable Buttons⏺️
On the bistable button, there are 3 inputs from the button, a clock divider output, and a reset. The output button will then be used to control the PWM for the DC motor. In this bistable button there are two states where the button is pressed and the button is not pressed. If the button is pressed, there will be output 1, if not pressed, the output will be 0. The output of the bistable button will be connected to the clock enable input on counter A.
3. Clock Divider⏰
Clock Divider has 2 inputs, namely the MHz clock taken from CoolRunner-II CPLD and Reset. And ClockDivOut works to divide the clock signal. The clock divider will divide the clock from the input so that the output of the clock is not speed and will be around 2KHz to drive the DC motor. Within the Clock divider, 2 signals are created, the counter as integers 1 to 4000 inside the counter, and the tmp signal which is coupled to the ClockDivOut output. In the Clock Divider process, the clock that gets the input from will make the counter inside the Clock divider go up to 2000, where then the output will give a high signal until the counter is at 4000, reset to 1, and at the same time make the output low.
4. Counter🔄
- Counter A: Each time Counter A gets from the pressed button, the signal connected to the output will add 1 bit up to 1111. If the output is 1111 and the button is pressed, the output will return to 0000. But, if the reset button is pressed, the counter will return to 0000.- Counter B Each time Counter B gets input from the clock divider, the output signal will add 1 bit up to 1111. Once the output reaches 1111, the counter will then flip to 0000 and repeat as long as there is an input clock. If the reset button is pressed, the counter will return to 0000.
5. Comparator🤷♀️
The comparator compares the output of Counter A and Counter B to get the PWM. Inside, the process is that if the output of Counter A is greater than Counter B, it means that the comparator will give a high output, otherwise the output will be low. The comparator can compare the 2 comparators because both counters A and B are connected to the same clock divider, and the 2 output counters will give the same output every second. Since both counters are 4 bit equal, there will be 16 different speed levels.
First we have to upload the VHDL program into the CPLD board. Then, we install the motor driver (as shown in figure) to the channel that we have programmed in the ucf file. Because this DC motor requires 12V to operate, we need an external power supply which we can provide via the blue terminal available on the motor driver.
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