koyamanx / riscv-debug

Implementation of RISC-V Debug module

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riscv-debug's Issues

Implement sticky error state in dmi register of DMI

Implement sticky op in dmi register in DTM

'op' field of dmi register has sticky error state if previous operation failed.
This field only be reset by dmireset.
DTM updates dmi register in Capture-DR, however if op field indicates sticky error, it never update op field.

• Check op is not sticky in Capture-DR, if sticky let it be
• Clear op field at dmireset

Replace DMI bus with suggested DMI bus

Replace DMI bus with suggested DMI bus

We have currently used simple handshake bus for DMI.
Debug spec recommends to use its suggested bus noted on Appendix A.

Implement dmihardreset in DTM.

Implement dmihardreset in DTM.

dmihardreset in dtmcs(DTM Control and Status) register is not fully implemented for now.
Primary functions of this bits are the following.

• reset DTM to forget about any outstanding DMI transactions
• return all register to reset value
• reset state machine