Comments (2)
dragino
commented on August 28, 2024
In the new board Core9558 module, the RF design will according to the reference design and this issue should be fixed.
from board.
spiccinini
commented on August 28, 2024
Fixed in phase2. I will upload the measurments done but for the record sensitivity is similar to tplink Archer AC1750 rev4 (US) in all antenna ports (using same signal generation with USRP and direct cable connections).
from board.
Related Issues (20)
- Move PCIe1 device HOT 1
- Change PCIe1 3.3V source HOT 2
- Change GPS 3.3V source HOT 1
- Individual disable for PCIe0 and 1 HOT 1
- Add hack ethernet port HOT 1
- Add magnetics board option HOT 1
- Power domain isolation HOT 2
- Shorten GPS uart path HOT 1
- Add JTAG connector HOT 1
- General track and vias review
- Complete BOM HOT 7
- Improve impedance of PCIe routing HOT 4
- Remove SPI connection from watchdog to core board (introduced by mistake in the Eagle to Kicad migration) HOT 1
- Improve Ethernet differential pair impedance and reduce series resistance HOT 2
- Missing holes in PCB HOT 6
- Missing Core Board? HOT 2
- Properly design coupled transmission lines HOT 2
- Add a way to disconnect the power to the board through GPIO HOT 3
- General Silk screen check
- Change JATG pull down resistors Value
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from board.