Comments (6)
There's broadly two ways to deal with this: make the legalizer not emit this, and/or handle it when it does. It's unclear which is easier for this case; G_ICMP i16, i32, and i64 collectively have a metric ton of cases to handle, but G_SELECT is fairly difficult to lower, since it involves control flow. A good implementation of G_ICMP might also involve control flow, too, so that might not make too much difference.
Control flow is trickly to handle in the isel pipeline; pretty much all the passes naively iterate over the basic blocks and assume there are no changes to the set. The one exception I'm aware of is the FinalizeISel pass right after instruction selection, which has dedicated logic to lower pseudos that might introduce or remove basic blocks.
We do get some immediate benefit from the Legalizer handling all of this; it emits terrifically bad code, but it does bring the full set of cases down to 8-bits.
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Yanno, I took a closer look at the code in LegalizerHelper.cpp, and amazingly, this is actually one of the two standard implementations of 16-bit compares on the 6502!
The usual logic is: compare the high byte for equality, then if it's equal, do the comparison on the low byte, otherwise, do the comparison on the high byte. That's exactly what the Legalizer emits: a G_SELECT between the low comparison result and the high comparsion result, based on whether or not the high byte is equal.
Accordingly, if we go ahead and lower G_SELECT to a pseudo-instruction, then emit control flow for it, I think the natural 2-byte comparison sequence sort of just falls out. We'll probably want to eventually implement a combine to detect if there are any 16-bit subtractions with the same arguments; the other variant of 16-bit comparison is to do a 16-bit subtraction, which we may already be doing. In that case, we can tack on a pseudo or something to the subtractions that mark that the comparison result is needed. How to get that to work was a big open question in the earliest versions of my pre-LLVM code generation plans, but in GlobalISel, it just falls right out!
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An example of lowering G_SELECT to a pseudo, starts around 23:15:
https://www.youtube.com/watch?v=Zh4R40ZyJ2k
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See https://github.com/llvm-mos/llvm-mos/tree/bug/issue-40 for a failing G_ICMP/G_SELECT combination. Building the check-llvm-codegen-mos target reproduces.
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The game.ll example program in https://github.com/llvm-mos/llvm-mos/tree/bug/issue-40, was actually taken from https://github.com/sgadrat/6502-compilers-bench/blob/master/code_samples/ccgame/game_01_start.c . So an actual benchmark comparing llvm-mos against other C compilers will be possible after this bug is completed. I see frequent progress occuring on these issues, thank you.
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This should be more-or-less working; the printf.ll example I'm working off of fails in register allocation now, way down the pipe from instruction selection. You'll have to give the game example another try; chances are something else with it will break, but maybe not.
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Related Issues (20)
- Port to Apple M1 HOT 13
- Include tools needed by rust-mos build HOT 4
- Random text allowed in assembler HOT 2
- Real tail call optimization
- Inverting a boolean should use eor HOT 3
- Offset should be combined with array index HOT 5
- Build our distributions using install-distribution HOT 1
- Potentially codegen issue with ZP variables HOT 7
- Linker error with inline assembly: unable to translate instruction: call HOT 9
- Convert llvm-mos ELF objects to ca65 objects in llvm-objcopy HOT 18
- Compiler generates incorrect assembly code which then leads to infinite loop in runtime. HOT 6
- mega65 target doesn't need soft stack HOT 4
- Symbols based on .zeropage symbols should also be .zeropage
- MMC1 32K banking
- Extract out `atari8-common` from `atari8-stdcart``
- Make `atari8-stdcart` match new NES LMA convention
- Elide loads and stores of killed imaginary registers
- Baremetal configurations HOT 1
- Lift spill slots to imaginary registers HOT 3
- arithmetic shift treated as 16-bit HOT 4
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