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View Code? Open in Web Editor NEWTiny peripheral library for STM8 microcontrolles
License: MIT License
Tiny peripheral library for STM8 microcontrolles
License: MIT License
In the the trunk for SDCC, the definition for getchar returns an int
stm8-bare-min/examples/UART/main.c
Line 19 in 787c487
Dear lujji,
sorry for breaking your peephole rules for optimizing bit access on registers. In revision #9990, I made some changes in SDCC, resulting in
ld a, 0x500f
xor a, #0x10
ld 0x500f, a
instead of the previously generated code
ld a, 0x500f
xor a, #0x10
ldw x, #0x500f
ld (x), a
This will probably require an update of your peephole rules.
Philipp
P.S.: While far less elegant (it uses SDCC language extensions instead of standard C) the following way of declaring the I/O registers currently allows more optimizations:
volatile uint8_t __at(0x500f) PD_ODR;
Edit: Inserted missing volatile.
hi lujji,
thanks a lot for your excellent tutorial! I really marvel at your minimalist approach :-) The RAM example worked out of the box and is easy to understand :-) However, I still have some questions / remarks:
do I understand correctly that this approach requires that the RAM routines don't use absolute jumps within RAM or calls between RAM routines...? Because the .map file shows e.g. RAM0 in flash at 0x81E6. If my understanding is correct, how do you ensure that absolute jumps/calls within RAM are not used by SDCC?
and if absolute jumps or calls within RAM are required for some reason, how about this (different) procedure (for example @ 0x00a0):
a) link for RAM (-Wl-bRAM0=0x00a0
) --> absolute addresses are ok, but in hexfile code is in RAM and is lost after reset (already verified)
b) in hexfile move code segment from RAM to flash address --> is not lost after reset, but located at wrong address. I plan to add this "move" feature to hexfile_merger within the next few days
c) copy to same RAM address as above just like you already do, but with an additional __at (0x00a0)
for f_ram[]
to ensure the correct address.
Optionally one could also reserve a buffer of sufficient size in RAM @ 0x00a0 (or wherever) via linker and only point *f_ram
to that address in the main program.
The main issue I see is how to pass the parameters like link address and code length between the different tools/steps.
I understand that this is not minimalist anymore (sorry for that!). But is my understanding correct and, if yes, any idea how to perform this in a fool-proof way?
Thanks again for your great tutorials and have a great day! :-)
Regards,
Georg / gicking
ITC_BASE_ADDRESS should be 0x7F70 rather than 0x7F60 and the interrupt addresses are incorrectly based on CFG_BASE_ADDRESS
Hi, is this code available under a particular license? Thanks!
Hi !
in file stm8s.h ( for stm8s ) says:
/* TIM2 (mutually exclusive with TIM5) */
#define TIM2_BASE_ADDRESS 5300
it should be:
/* TIM2 (mutually exclusive with TIM5) */
#define TIM2_BASE_ADDRESS ox5300
It took me a couple of hours debugging a non functioning timer, until I started
looking at the assembly code.
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