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Shell 9.13% Python 55.36% Verilog 9.35% Assembly 1.34% Makefile 2.37% Batchfile 2.48% SMT 0.76% Jupyter Notebook 19.22%

dinome's Introduction

DINoMe

This repository include three submodules:

  1. chipyard with our Tiny configurations for NormalCache, ScatterCache, and PhantomCache, defined in chipyard/generators/example/src/main/scala/NormalConfig.scala, chipyard/generators/example/src/main/scala/ScatterConfig.scala, chipyard/generators/example/src/main/scala/PhantomConfig.scala;
  2. yosys with a modified SMT2 transformer to generate transition formula and initial state;
  3. cryptominisat_DINoMe: Implementation for postcondition construction, and count/ sample <S, S', C, I> tuples;

and two folders:

  1. ML: ML related codes for feature engineer and rule generations; (under xgboost)
  • Train rules using interference sample and noninterference sample; (train_bits.py)
  • Organizing rules by sorting and dropping rules (Fig. 18); (rule.py)
  1. process: include bash/python scripts for experiments and software payload for case studies.
  • Prerequisite1: You should build yosys and build your verilog code (e.g., make verilog CONFIG=NormalTinyBoomConfigS4W4 in chipyard) to a directory with boom.ys (e.g., process/normal/cache-S4W4).
  • Prerequisite2: to composse multi-cycle postcondition, counting and sampling solutions, you should install compose, count, and sampler binaries using https://github.com/DINoMe-Project/cryptominisat
  • Under process/normal/cache-S4W4, run yosys boom.ys converts verilog code to SMT2 transition logic and initialization logic for a tiny BOOM with 4-way 4-set cache. This may takes minutes to an hour.
  • process/script/cache_observe.sh is one-step script to generate postcondition for cache-based side channel examples, it would generate a directory states with s${cycle}.cnf. This may takes long depending on how many cycles you want. By default, we simplify the CNF per cycle. You can tweak this by updating generate_cnf.sh

dinome's People

Contributors

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