meulengracht / mollenos Goto Github PK

Needs to be completed, it enables fsbr, it also disables fsbr on bulk/control done transfers. But it does not handle disabling fsbr on removal of int's

Processes don't get cleaned up yet, including address spaces

(MCore) Should be started in a new thread
(x86) Iterate and disable before iterating and creating new devices

Several things needs to be done here,

Implement all neccessary syscalls (and there is a lot)
Move modules to have their own process with a event handler (Kill, Restart, etc events it should handle)
Move much of the shared functionality in to a library (fx: the list implementation is needed by drivers, and can't be imported if they run in usermode and list is in kernel mode memory)

Fix the code that applies the data, I'm not sure it handles when there
is no report id / when there is correctly.

As the title says.

Reasonable enough it shuts down the scheduling timer when entering idle thread to avoid rescheduling the idle thread and save resources, however it seems like no interrupts follow as well.. Which is weird since i need interrupts to wakeup the scheduler again. I'm thinking of building a threading log so I can see all thread activity

Needs to be so much prettier, and support our generic Read/Write/Query

Executable data (PE) must be cleaned up on process cleanup

Threads don't get cleaned up yet.

Implement and finish the VFS. A lot of work is neccessary

OHCI uses custom length for isochronous transfers (max of 0x2000 per td instead of MPS)
EHCI uses custom length for pretty much everything (control and bulk can handle between 16k-20k per td) and interrupt/isoc can handle up to 3k per transfer.

We need an XHCI driver!

We need to rewrite the current UHCI driver to the new coding format and then fix it. It had a lot of issues.

We have periodic support, but we don't use ANY of the other gazillion timers it offers for perf

Enumerate SRAT and build a hierarchy view of cpus and their numa domains

Now that I've built a cross compiler (clang), we need to be able to load elf files which is what I can get it to compile to....

Does not work how i want it to

Implement MSI support for timers that support it

We also need an AHCI driver, but this is not that important right now, Untill we actually begin to install the os to hdds

USB -> Make sure to add zero-length packets when neccessary
UHCI -> Make sure implementation works
OHCI -> Make sure implementation works
EHCI -> Make sure implementation works

I have coded the support, but it really needs testing

We need an EHCI driver

Unicode support is easy enough in the kernel (almost done there), but the challenge is integrating it into the CLIB streamout, which I will have to do.

After we abstracted the virtual memory access we can now completely move ACPICA out to MCore, which means we can reuse it no matter which platform we run MCore on

Implement support for processes

• Implement an SRAT enumeration support to build cpu/numa domain hierarchy
• Improve the way we represent cpu's and cores in the kernel
• Always enable x2apic mode if available

So we can get battery information