micro-fpga / litex-boards Goto Github PK

tested on C10LP and Artix targets, full variant ok, linux variant no or short (10 char) uart output from BIOS

Very excited about the max1000 fpga support files here, however I've been unable to get them to work. Please forgive if I'm missing something simple, as I'm very new to this stuff.

I've pulled the master branch into my litex repo, and ran the targets/max1000.py file. I had to modify the integrated_main_ram_size (which was commented out) to get it to run to this point (otherwise I get that the RAM doesn't fit onto the device), and then modify the litex soc_core.py file to use the LM32 cpu. Other than these two changes, everything is entirely a fresh pull from github. After a minute or so of compilation, I get the following error:

Device 10M08SAU169 does not support 1-bit Passive Serial scheme
Error (213050): Convert Programming Files was NOT successful -- refer to messages that appear above this message for more information
Error: Quartus Prime Convert_programming_file was unsuccessful. 1 error, 0 warnings

Based on this comment (https://forum.trenz-electronic.de/index.php?topic=1111.0) I also tried running with the CPU type VexRiscv, which gives me the following error:

Error (170012): Fitter requires 543 LABs to implement the design, but the device contains only 504 LABs
Error (171000): Can't fit design in device
Error: Quartus Prime Fitter was unsuccessful. 2 errors, 12 warnings

I've downloaded/added to my $PATH the Quartus Lite version 18.1.0, build 625 and am running on Ubuntu 16.04.

If you have any thoughts or ideas of things I should investigate, I'd really appreciate it! Thanks!