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License: GNU General Public License v2.0
RealtimeIO for LinuxCNC based on an FPGA
License: GNU General Public License v2.0
Ground-Control-Station for multiple Protocols * based on OpenGL/OpenGL-ES with SDL/SDL2 * Support for MavLink (Autoquad6, MegapiratesNG, APM2, ...) * Support for MultiWii-2.1 (MultiWii ...) * Support for Baseflight (Naze32, MW32 ...) * Support for UAV-Talk (OpenPilot, CC, C3D, ...) * Support for NMEA-GPS (über beliebige Serielle Funk-Brücken) * Support for FrSky-Telemetrie (inkl GPS & RSSI) * Network-Support: HTML5 Frontend and (Live-)Data-Export (Google-Earth, Blender) * Touchscreens-Optimization * for Linux-PC's, Mac-OSX, Android, Windows and Raspberry-PI(raspbian) * GPL v2 or later Homepage: http://www.multixmedia.org/Multi-GCS/index.html Compilation/Installation: Linux/Desktop (OpenGL): apt-get install build-essential clang pkg-config libxml2-dev libpng12-dev libx11-dev zlib1g-dev libopencv-dev libglew-dev libglu1-mesa-dev libgl1-mesa-dev libsdl-net1.2-dev libsdl-image1.2-dev libsdl1.2-dev tk8.5-dev libgles2-mesa-dev dpkg-dev libvlc-dev libudev-dev vlc-nox gzip libpcap-dev make -f Makefile.gl-sdl all install deb Linux/Desktop (OpenGL-ES): apt-get install build-essential clang pkg-config libxml2-dev libpng12-dev libx11-dev zlib1g-dev libopencv-dev libglew-dev libglu1-mesa-dev libgl1-mesa-dev libsdl-net1.2-dev libsdl-image1.2-dev libsdl1.2-dev tk8.5-dev libgles2-mesa-dev dpkg-dev libvlc-dev libudev-dev vlc-nox gzip libpcap-dev make -f Makefile.gles-x11 all install deb Linux/Raspberry-Pi (OpenGL-ES): apt-get install build-essential clang pkg-config libxml2-dev libpng12-dev libx11-dev zlib1g-dev libopencv-dev libglew-dev libglu1-mesa-dev libgl1-mesa-dev libsdl-net1.2-dev libsdl-image1.2-dev libsdl1.2-dev tk8.5-dev libgles2-mesa-dev dpkg-dev libvlc-dev libudev-dev vlc-nox gzip libpcap-dev make -f Makefile.rpi all install deb Mac-OSX (OpenGL): make -f Makefile.osx all app Android (OpenGL-ES): sh install-android-sdk.sh make -f Makefile.android all install Win32 (OpenGL / cross-compile with mingw on linux) sh install-mingw.sh make -f Makefile.win32-cross all pack installer Android-Permissions: READ/WRITE_EXTERNAL_STORAGE to read and write map-files on storrage INTERNET to get maps and open server-port for the html5-gui/blender/google-earth support (closed by default) ACCESS_FINE_LOCATION to get gps-data for the map BATTERY_STATS to get battery-data BLUETOOTH / BLUETOOTH_ADMIN for fc-connection over bluetooth CAMERA for video-input/display in the hud-screen Raspberry-PI: #cat /boot/config.txt hdmi_safe=1 hdmi_drive=2 disable_overscan=1 overscan_left=0 overscan_right=0 overscan_top=0 overscan_bottom=0 hdmi_group=2 hdmi_mode=22 arm_freq=700 core_freq=250 sdram_freq=400 over_voltage=0 #cat /root/.multigcs/setup.cfg model_name view_mode 7 contrast 0 screen_w 1280 screen_h 720 screen_border_x 32 screen_border_y 28 keep_ratio 1.422200 #cat /etc/rc.local #!/bin/sh -e /etc/init.d/dbus restart /etc/init.d/bluetooth restart su - root -c gcs exit 0
I have an SBC, an FPGA board and stepper motor drivers with STEP/DIR inputs. How do I connect it correctly?
As I understand, if FPGA and SBC both have 3.3V I/O levels, then SPI lines can be connected directly between them, and both boards can be powered from the same source.
If smaller stepper motor drivers are used (like A4988), their logic side can also be powered directly form the same source, and STEP/DIR lines can be connected directly to FPGA. It's best to have an isolated power supply for the motors, so the motor side ground is not connected to the logic side ground of the stepper motor driver.
Interfacing with bigger motor drivers would need some kind of level-shifting, and this is what ULN2803D is normally used for.
While it's possible to connect inputs like endstop switches directly to 3.3V and then directly to FPGA, it's recommended to use higher voltages. In this case they would use the same isolated power supply as the motors, and would need an optocoupler to connect to FPGA, and this is what ILD207T is normally used for.
Are the above points right? Please correct me if I am wrong!
As a continuation of yesterdays issue with loading the rio component I was having issues with the byte order being incorrect.
As I thought, although I haven't tested yet as this issue has taken up alot of time, should the bracket fix for the DINs be applied to the DOUTs as well, both when creating the pins and in the read\write update. The following mod I've only applied to the rio.c file in my output folder on my local machine. My source is a too little messy ATM for a pull request.
// Inputs
int di = DIGITAL_INPUT_BYTES;
// di points to dest
// bi points to source
// bi start > di end
// bi end > di start
// Without if there is 2 or more bytes for our inputs
// the DIN bytes are not in the correct order
// The bit order for each byte is ok
// Maybe changing bi to src_index and di to dest_index might make to code
// easier to read.
for (bi = 0; bi < DIGITAL_INPUT_BYTES; bi++)
{
di--;
// printf("Byte %d Data %d\n", bi, rxData.inputs[bi]);
for (i = 0; i < 8; i++) {
if ((rxData.inputs[bi] & (1 << i)) != 0) {
*(data->inputs[(di * 8 + i) * 2]) = 1; // input is high
*(data->inputs[(di * 8 + i) * 2 + 1]) = 0; // not
}
else {
*(data->inputs[(di * 8 + i) * 2]) = 0; // input is low
*(data->inputs[(di * 8 + i) * 2 + 1]) = 1; // not
}
}
}
I hope you can understand this, it drove me nuts. I wonder to if this should apply to the Digital out section as well.
Not an exactly an issue just reaching out.
Saw your thread on the Linuxcnc forum (can't use the forum but that is another story), anyways I thought I had a tiny BX board but alas not the case, but I do have one of these, iCE40-HX8K Breakout Board . Plus a couple of 3.3 to 5v breakout boards I used with a beagle bone black.
As this particular board has a 12MHz clock and a USB to SPI programmer, could I use the config TurBos uses for the Icebreaker as a basis ?
Sorry if this is the wrong channel to reach out. I hope it was ok to upload the info for this board.
FPGA-EB-02031-1-2-iCE40HX-8K-Breakout-Board-User-Guide.pdf
Just wondering if you've had time to experiment with the UDP option for transport ?
This is something I'd like to take a look at.
I'm trying to use joint_pwmdir on ECP5. I've fixed one issue with enable signal (see pull request), but there still appears to be an issue with generated pwm signal.
Test setup:
Colorlight i5 dev board with custom +/-10V amplifier board
W32_ETH UDP2SPI bridge
qt_spitest.py for testing
Config.json: https://gist.github.com/festlv/ea4236ac91a1b3c0b6d7317be0bbccfa
Observations:
EN signal goes high as soon as test client connects.
DIR signal works correctly: it's high when pwm output is non-negative, and low when the output is positive.
PWM signal goes high whenever PWM output is non-zero (that is: it's low when joint output is 0 and high whenever there's any output).
Hi.
Is there any way to set ouput pwm reverse
0% = 3.3v and 100% = 0V
I try json in example with invert= true
The ouput still 0%=0v , 100%= 3.3V
Was trying to create a config with 17 inputs was getting an error when loading the rio mudule.
HAL: ERROR: pin_new(pinname) called with already-initialized memory
Tracked it down to here
for (bn = 0; bn < DIGITAL_INPUT_BYTES; bn++) {
for (n = 0; n < 8; n++) {
retval = hal_pin_bit_newf(HAL_OUT, &(data->inputs[bn * 8 + n * 2]), comp_id, "%s.input.%01d", prefix, bn * 8 + n);
if (retval != 0) goto error;
*(data->inputs[bn * 8 + n * 2]) = 0;
retval = hal_pin_bit_newf(HAL_OUT, &(data->inputs[bn * 8 + n * 2 + 1]), comp_id, "%s.input.%01d-not", prefix, bn * 8 + n);
if (retval != 0) goto error;
*(data->inputs[bn * 8 + n * 2 + 1]) = 1;
}
This fix seemed to work: The added printfs were to see the difference in formula
for (bn = 0; bn < DIGITAL_INPUT_BYTES; bn++) {
for (n = 0; n < 8; n++) {
//printf("Pin name: rio.pin-%02d-in @ mem %02d\n ",bn*8+n,(bn*8+n)*2);
//printf("Pin name: rio.pin-%02d-in @ mem %02d\n ",bn*8+n,bn*8+n*2);
retval = hal_pin_bit_newf(HAL_OUT, &(data->inputs[ (bn * 8 + n) * 2 ]), comp_id, "rio.pin-%02d-in",bn * 8 + n);
if (retval != 0) goto error;
*(data->inputs[ (bn * 8 + n) * 2 ]) = 0;
retval = hal_pin_bit_newf(HAL_OUT, &(data->inputs[ (bn * 8 + n) * 2 + 1 ]), comp_id, "rio.pin-%02d-in-not", bn * 8 + n);
if (retval != 0) goto error;
*(data->inputs[(bn * 8 + n) * 2 + 1]) = 1;
}
Below is a session with the original code (I was messing around with pin names) as you can see memory locations are duplicated
halcmd: loadrt rio
Note: Using POSIX realtime
Pin name: rio.pin-00-in @ mem 00
Pin name: rio.pin-01-in @ mem 02
Pin name: rio.pin-02-in @ mem 04
Pin name: rio.pin-03-in @ mem 06
Pin name: rio.pin-04-in @ mem 08
Pin name: rio.pin-05-in @ mem 10
Pin name: rio.pin-06-in @ mem 12
Pin name: rio.pin-07-in @ mem 14
Pin name: rio.pin-08-in @ mem 08
HAL: ERROR: pin_new(rio.pin-08-in) called with already-initialized memory
HAL: ERROR: pin_new(rio.pin-08-in-not) called with already-initialized memory
Pin name: rio.pin-09-in @ mem 10
HAL: ERROR: pin_new(rio.pin-09-in) called with already-initialized memory
HAL: ERROR: pin_new(rio.pin-09-in-not) called with already-initialized memory
Pin name: rio.pin-10-in @ mem 12
HAL: ERROR: pin_new(rio.pin-10-in) called with already-initialized memory
HAL: ERROR: pin_new(rio.pin-10-in-not) called with already-initialized memory
Pin name: rio.pin-11-in @ mem 14
HAL: ERROR: pin_new(rio.pin-11-in) called with already-initialized memory
HAL: ERROR: pin_new(rio.pin-11-in-not) called with already-initialized memory
Pin name: rio.pin-12-in @ mem 16
Pin name: rio.pin-13-in @ mem 18
Pin name: rio.pin-14-in @ mem 20
Pin name: rio.pin-15-in @ mem 22
halcmd:
I hope this makes sense.
hello
before i already flash my tangnano 9k and success
but now i reflash i got error like this..no response flash success
from my tang nano 9k anymore
DONE
Jtag frequency : requested 2.50MHz -> real 2.00MHz
Erase SRAM DONE
Erasing FLASH: [= ] 1.00%DONE
Erasing FLASH: [==================================================] 100.00%
Done
write Flash: [==================================================] 100.00%
Done
CRC check : FAIL
Read: 0x12fa0000 checksum: 0x37d1
Through some trials and tribulations I will skip here I discovered that if linuxcnc crashes then the SPI setup of my pi 4 would get into some strange state and I could no longer connect to the tang 9k.
The naive fix was to reboot, the less hair pulling fix is to remove and restart the spi module
sudo modprobe spi-bcm2835 -r;sudo modprobe spi-bcm2835
This seems to have something to do with the set_pud command here
Also, noticed that this is hard coded to CE0 in the initialization but elsewhere it is using a CE1 pin
LinuxCNC-RIO/generators/linuxcnc_component/rio.c
Line 1175 in 2507c97
this manifests as per below
In the unstuck state GPIO 7 doens't have the SPI alt state and a crashing linuxcnc doesn't lock SPI up. The other way to see the stuck state is with qt_spitest.py where all the rx values are the same and modprobe remove/restart the spi module allows the qt_spitest.py to work again.
I can do a PR to make the CS pin a define or variable if you are open to it, may also be worthwhile to make the other pins easier to update with some notes on how to set the overlay to enable spi1..4
Oliver I just noticed that Tangnano 9k has been removed from this repository! Was there a few days back any chance for it being redone?
net spindle_encoder-rpm rio.spindle_encoder-rpm pyvcp.spindle_encoder-rpm
this auto generated config line in custom_postgui.hal seems to throw a pin not found error
Also the docs for vin_quadencoderz don't' seem up to date or document all the options.
my config is:
{
"type": "vin_quadencoderz",
"pullup": true,
"name": "spindle_encoder",
"function": "spindle-index",
"scale": 600.0,
"pins": {
"a": "33",
"b": "30",
"z": "29"
}
},
Blink is working
SPI is working
Encoder is working
but nothing else, no pwm, no steppgen, no sepgen feedback
Hello,
I'm trying to get the linuxcnc configs to run with the icebreaker board, but I'm unable to reset the E-STOP
I get this error: Bad SPI payload = 32303a30
Thanks
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