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Z80 CPU for OpenFPGAs, with Icestudio

License: GNU General Public License v3.0

Assembly 94.35% Shell 0.01% Verilog 5.49% Python 0.05% Makefile 0.11%
icestudio z80 fpga fpga-soc ice40

z80-fpga's Introduction

Z80-FPGA

Z80 CPU for OpenFPGAs, with Icestudio

Quick start

  • Open the z80-soc-16KB-Boot.ice file with Icestudio
  • Connect the Alhambra-II board (or compatible) and upload the design
  • After 2min aprox. the LEDs will show the value 0xAA
  • Let's upload a program test: open a terminal
  • Move to the roms folder
  • Execute the following line:
python3 z80-loader.py 05-counter.bin
  • After 2 seconds you will see a binary counter running on the LEDs

  • If you want to assemble that example, execute the following comands:

z80asm -o 05-counter.bin 05-counter.s

UART and pushbutton

The z80-soc-16KB-Boot-uart.ice file adds the following:

  • TX/RX Uart mapped in ports 0x10 (Data) and 0x11 (Status). The Data port is for transmitting (out) and receiving (in)
  • Input port 0x00. The SW2 button can be read from the bit 0 of port 0x00

Have a look at this examples for more details:

  • 08-button-seq.s
  • UART-*.s

z80-fpga's People

Contributors

cavearr avatar democrito avatar obijuan avatar

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z80-fpga's Issues

Memory access not working well

There is a bug in the main circuits that prevents the instrucctions from reading from memory when are executed.

Ex:

The instruccion ld A, (0x0000) is not working fine. It does not load the A reg with the correct value

JP NZ, hangs execution

When you use JP NZ, execution hangs, i think Z bit from Flag register is not checked with this instruction.

If code is short, with JR NZ, works fine, but it is important to work for compatibility with other codes and programs.

File attached with the FAIL code (remove txt extension if it is needed).

led_parpadeo_FAIL.s.txt

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