olimex / esp32-gateway

ESP32 IoT Gateway board with BLE WIFI and Ethernet

ESP32-GATEWAY

ESP32 WiFi / BLE development board with Ethernet, microSD card, GPIOs made with KiCAD

esp32-gateway's Issues

has anyone ported this example to esp-idf 4.x?

These appear to be for 3.x. Has someone ported?

ETH_PHY_demo cannot work with rev E board

Hello,
I cannot make the example work with REV E board.
I also tried with ESP32-EVB example, but the result is the same

[Mar  7 11:03:21.069] I (28) boot: ESP-IDF v3.1.3 2nd stage bootloader
[Mar  7 11:03:21.079] I (28) boot: compile time 09:44:15
[Mar  7 11:03:21.082] I (28) boot: Enabling RNG early entropy source...
[Mar  7 11:03:21.087] I (33) boot: SPI Speed      : 40MHz
[Mar  7 11:03:21.090] I (37) boot: SPI Mode       : DIO
[Mar  7 11:03:21.096] I (41) boot: SPI Flash Size : 4MB
[Mar  7 11:03:21.098] I (45) boot: Partition Table:
[Mar  7 11:03:21.104] I (49) boot: ## Label            Usage          Type ST Offset   Length
[Mar  7 11:03:21.110] I (56) boot:  0 nvs              WiFi data        01 02 00009000 00006000
[Mar  7 11:03:21.118] I (63) boot:  1 phy_init         RF data          01 01 0000f000 00001000
[Mar  7 11:03:21.126] I (71) boot:  2 factory          factory app      00 00 00010000 00100000
[Mar  7 11:03:21.132] I (78) boot: End of partition table
[Mar  7 11:03:21.137] I (82) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x0d8d8 ( 55512) map
[Mar  7 11:03:21.154] I (111) esp_image: segment 1: paddr=0x0001d900 vaddr=0x3ffb0000 size=0x022dc (  8924) load
[Mar  7 11:03:21.162] I (115) esp_image: segment 2: paddr=0x0001fbe4 vaddr=0x40080000 size=0x00400 (  1024) load
[Mar  7 11:03:21.171] I (118) esp_image: segment 3: paddr=0x0001ffec vaddr=0x40080400 size=0x00024 (    36) load
[Mar  7 11:03:21.182] I (127) esp_image: segment 4: paddr=0x00020018 vaddr=0x400d0018 size=0x277e8 (161768) map
[Mar  7 11:03:21.237] I (192) esp_image: segment 5: paddr=0x00047808 vaddr=0x40080424 size=0x08dc0 ( 36288) load
[Mar  7 11:03:21.257] I (213) boot: Loaded app from partition at offset 0x10000
[Mar  7 11:03:21.263] I (213) boot: Disabling RNG early entropy source...
[Mar  7 11:03:21.268] I (214) cpu_start: Pro cpu up.
[Mar  7 11:03:21.271] I (217) cpu_start: Starting app cpu, entry point is 0x40080eb4
[Mar  7 11:03:21.279] I (0) cpu_start: App cpu up.
[Mar  7 11:03:21.282] I (228) heap_init: Initializing. RAM available for dynamic allocation:
[Mar  7 11:03:21.288] I (234) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
[Mar  7 11:03:21.296] I (240) heap_init: At 3FFBC3B8 len 00023C48 (143 KiB): DRAM
[Mar  7 11:03:21.302] I (247) heap_init: At 3FFE0440 len 00003BC0 (14 KiB): D/IRAM
[Mar  7 11:03:21.307] I (253) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
[Mar  7 11:03:21.315] I (260) heap_init: At 400891E4 len 00016E1C (91 KiB): IRAM
[Mar  7 11:03:21.321] I (266) cpu_start: Pro cpu start user code
[Mar  7 11:03:21.326] I (284) cpu_start: Starting scheduler on PRO CPU.
[Mar  7 11:03:21.332] I (0) cpu_start: Starting scheduler on APP CPU.
[Mar  7 11:03:21.338] I (287) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE
[Mar  7 11:03:21.349] I (287) emac: emac start !!!
[Mar  7 11:03:21.351]
[Mar  7 11:03:21.351] I (297) emac: emac reset done
[Mar  7 11:03:22.339] E (1297) emac: Timed out waiting for PHY register 0x2 to have value 0x0007 (mask 0xffff). Current value 0xffff
[Mar  7 11:03:23.339] E (2297) emac: Timed out waiting for PHY register 0x3 to have value 0xc0f0 (mask 0xfff0). Current value 0xffff
[Mar  7 11:03:24.339] E (3297) emac: Timed out waiting for PHY register 0x2 to have value 0x0007 (mask 0xffff). Current value 0xffff
[Mar  7 11:03:25.339] E (4297) emac: Timed out waiting for PHY register 0x3 to have value 0xc0f0 (mask 0xfff0). Current value 0xffff
[Mar  7 11:03:26.339] E (5297) emac: Timed out waiting for PHY register 0x2 to have value 0x0007 (mask 0xffff). Current value 0xffff
[Mar  7 11:03:27.339] E (6297) emac: Timed out waiting for PHY register 0x3 to have value 0xc0f0 (mask 0xfff0). Current value 0xffff
[Mar  7 11:03:28.339] E (7297) emac: Timed out waiting for PHY register 0x2 to have value 0x0007 (mask 0xffff). Current value 0xffff
[Mar  7 11:03:29.339] E (8297) emac: Timed out waiting for PHY register 0x3 to have value 0xc0f0 (mask 0xfff0). Current value 0xffff
[Mar  7 11:03:30.339] E (9297) emac: Timed out waiting for PHY register 0x2 to have value 0x0007 (mask 0xffff). Current value 0xffff
[Mar  7 11:03:31.339] E (10297) emac: Timed out waiting for PHY register 0x3 to have value 0xc0f0 (mask 0xfff0). Current value 0xffff

Wire1 not working in revG

Hi,

I've tried several times to get Wire1 working as the default pins for I2C are not available but could not achieve this.

I tried to setup Wire1 with these pins :

16 for SDA, 17 for SCL
36 for SDA, 35 for SCL
15 for SDA, 2 for SCL

And function used was 'Wire1.begin(SDA, SCL, 100000)'

All the tests have been done without SD card mounted or Ethernet.

Can I have a bit of help on this please?

eth2ap and up/down cycle

Hello,
I am trying to use the eth2ap example (4.4.6) to bridge wifi/eth.
However, the ethernet interface seems to go up/down all the time. Any hints?

(8959) eth_example: Ethernet Link Down
I (8969) wifi:flush txq
I (8969) wifi:stop sw txq
I (8969) wifi:lmac stop hw txq
I (10959) eth_example: Ethernet Link Up
I (10969) wifi:mode : softAP (e0:5a:1b:66:5e:db)
I (10969) wifi:Total power save buffer number: 16
I (14959) eth_example: Ethernet Link Down
I (14969) wifi:flush txq
I (14969) wifi:stop sw txq
I (14969) wifi:lmac stop hw txq
I (16959) eth_example: Ethernet Link Up
I (16969) wifi:mode : softAP (e0:5a:1b:66:5e:db)
I (16969) wifi:Total power save buffer number: 16
I (18959) eth_example: Ethernet Link Down
I (18969) wifi:flush txq
I (18969) wifi:stop sw txq
I (18969) wifi:lmac stop hw txq

Not receiving DHCP after hard reset and soft reboot on screen

First off, nice work. I'm really fond of the design as we need a board to operate as a gateway in an industrial environment where WiFi is not an option. I'm testing a specimen of the rev-b which works ok'ish, but is seems a little flaky. Hope this is a case of change-user.

When I build the ethernet example from the IDF (v3.1-dev-84-gf8bda324) and use the following options I get an IP

#
# Example Configuration
#
CONFIG_PHY_TLK110=
CONFIG_PHY_LAN8720=y
CONFIG_PHY_ADDRESS=0
CONFIG_PHY_CLOCK_GPIO0_IN=y
CONFIG_PHY_CLOCK_GPIO0_OUT=
CONFIG_PHY_CLOCK_GPIO16_OUT=
CONFIG_PHY_CLOCK_GPIO17_OUT=
CONFIG_PHY_CLOCK_MODE=0
CONFIG_PHY_USE_POWER_PIN=
CONFIG_PHY_SMI_MDC_PIN=23
CONFIG_PHY_SMI_MDIO_PIN=18

But something is off as it seems. When I do a power cycle or a hard button reset, it fails to get an IP from the DHCP server (loops 0.0.0.0). When I do a make monitor or the trusted screen /dev/cu.wchusbserial1410 115200 the device does a soft reboot and then I get an IP in the second loop and everything is fine.

What am I missing?

Gateway bluetooth - wifi / lan example with mqtt

Is it possible to get a demo sketch for arduino, that will use gateway board as BLE serial <==> wifi/lan gateway ?

i would like to see the bluetooth wifi lan running in tasks in arduino ide.

DO You have any suggestions how to do that ?

Can no longer flash after a reset - Failed to connect to ESP32: No serial data received.

Specifications

• Board: ESP32-GATEWAY-EA
• ESP-IDF: v4.4.4

Issue

Flashed the hello-world example from the ESP-IDF repository.

Had to press BUT1 to enable download mode, then RST1 to reset the board, then I could monitor successfully the hello world:

Hello world!
This is esp32 chip with 2 CPU core(s), WiFi/BT/BLE, silicon revision v3.0, 4MB external flash
Minimum free heap size: 301540 bytes

But then, I am unable to put back the download mode, each time I try to flash, I get this error:

esptool.py -p /dev/tty.usbserial-1460 -b 115200 --before default_reset --after hard_reset --chip esp32 write_flash --flash_mode dio --flash_freq 40m --flash_size detect 0x1000 bootloader/bootloader.bin 0x10000 ethernet_basic.bin 0x8000 partition_table/partition-table.bin 

esptool.py v3.3.2
Serial port /dev/tty.usbserial-1460
Connecting......................................

A fatal error occurred: Failed to connect to ESP32: No serial data received.
For troubleshooting steps visit: https://docs.espressif.com/projects/esptool/en/latest/troubleshooting.html

Did I overwrite Olimex's bootloader? Is there a manipulation that can be done to reset to factory?

Ethernet Example not working in espidf 3.40300.0 (4.3.0) (Board Rev. E)

Im hitting a problem where i'm compiling my old project with Platformio using the recent ESP platform. The Board does not get an IP anymore with the recent IDF SDK. To narrow it down, i made two examples to compare.

Example with current framework-espidf 3.40300.0 (4.3.0) not getting an IP Address:
https://github.com/derlucas/esp32_cubes/tree/ethernettesting/gateway_firmware

And an example with an older version framework-espidf 3.40001.200521 (4.0.1) which is working correctly:
https://github.com/derlucas/esp32_cubes/tree/ethernettesting-1.12.4/gateway_firmware

The minor changes are due to the API change from tcpipadapter to netif. In SDKconfig i turned on the Clock Output on Pin 17 for the Network Chip.

I tried fiddling with different timeouts in mac_config and phy_config without success. It does not matter, if phy_config.reset_gpio_num is "-1" or on "5".

It does not make a difference if the board is powered on (cold boot) or the RST1 button is pressed.
The green LED is steady on and the yellow LED is blinking. I tried different cables and an USB->ETH Adapter on my computer, it makes no difference. (I don't think it's a hardware issue, since the board is working with an older SDK Version).

I've seen this issue espressif/esp-idf#3998 but there is no helping information.

It would be very nice, if someone could figure out where the Problem is any maybe deliver a working Ethernet Example for espidf 4.3.0.

Lucas

ETH Example Never Aquires IP

Recently purchased: https://www.olimex.com/Products/IoT/ESP32/ESP32-GATEWAY/open-source-hardware loaded the ethernet example code and plugged ethernet cable into my belkin router, and I continueously see the following message for the ETH example (https://github.com/OLIMEX/ESP32-GATEWAY/tree/master/SOFTWARE/Newest-board-revisions/ETH_PHY_demo):

--- idf_monitor on /dev/ttyUSB0 115200 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
����Ѻ�� �u���ʽ��*��b������E��ӕ}��*�%��*�%��U�
��٩֥p��Z����¸���c��E�ٺ��0	}��W��A��}Ѳ���A�i�0E�ٺ��0������¸��}d������A��պT�Q�,�+̀V��2����Ѻ��f��0�b�Y���!�+њ��f��0�    !�
                ɕ��Ӓ  �W�슲���������Ѻ��0����b�Y�ʑ&�*
�+�:��0�������i����a���y��Q�°��*
I (30) boot: ESP-IDF v4.0-dev-266-ge7f85f198 2nd stage bootloader
I (30) boot: compile time 02:02:42
I (30) boot: Enabling RNG early entropy source...
I (36) boot: SPI Speed      : 40MHz
I (40) boot: SPI Mode       : DIO
I (44) boot: SPI Flash Size : 4MB
I (48) boot: Partition Table:
I (51) boot: ## Label            Usage          Type ST Offset   Length
I (59) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (66) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (74) boot:  2 factory          factory app      00 00 00010000 00100000
I (81) boot: End of partition table
I (85) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x0f0e4 ( 61668) map
I (116) esp_image: segment 1: paddr=0x0001f10c vaddr=0x3ffb0000 size=0x00f04 (  3844) load
I (118) esp_image: segment 2: paddr=0x00020018 vaddr=0x400d0018 size=0x29988 (170376) map
0x400d0018: _stext at ??:?

I (182) esp_image: segment 3: paddr=0x000499a8 vaddr=0x3ffb0f04 size=0x00ff4 (  4084) load
I (184) esp_image: segment 4: paddr=0x0004a9a4 vaddr=0x40080000 size=0x00400 (  1024) load
0x40080000: _WindowOverflow4 at /home/pluto/esp/esp-idf/components/freertos/xtensa_vectors.S:1779

I (189) esp_image: segment 5: paddr=0x0004adac vaddr=0x40080400 size=0x08154 ( 33108) load
I (217) boot: Loaded app from partition at offset 0x10000
I (217) boot: Disabling RNG early entropy source...
I (217) cpu_start: Pro cpu up.
I (221) cpu_start: Application information:
I (226) cpu_start: Project name:     ethernet_demo
I (231) cpu_start: App version:      2d4faa2
I (236) cpu_start: Compile time:     May 27 2019 02:02:41
I (242) cpu_start: ELF file SHA256:  d98beb5ce0083ab0...
I (248) cpu_start: ESP-IDF:          v4.0-dev-266-ge7f85f198
I (255) cpu_start: Starting app cpu, entry point is 0x40080eb4
0x40080eb4: call_start_cpu1 at /home/pluto/esp/esp-idf/components/esp32/cpu_start.c:267

I (0) cpu_start: App cpu up.
I (265) heap_init: Initializing. RAM available for dynamic allocation:
I (272) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (278) heap_init: At 3FFB4080 len 0002BF80 (175 KiB): DRAM
I (284) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (291) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (297) heap_init: At 40088554 len 00017AAC (94 KiB): IRAM
I (303) cpu_start: Pro cpu start user code
I (321) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (343) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE
I (453) emac: emac reset done
I (4553) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (4553) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (4553) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (4553) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (4563) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (6573) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (6573) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (6573) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (6573) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (6583) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (8593) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (8593) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (8593) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (8593) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (8603) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (10613) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (10613) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (10613) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (10613) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (10623) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (12633) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (12633) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (12633) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (12633) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (12643) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (14653) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (14653) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (14653) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (14653) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (14663) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (16673) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (16673) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (16673) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (16673) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (16683) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (18693) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (18693) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (18693) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (18693) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (18703) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (20713) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (20713) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (20713) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (20713) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (20723) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~

never gets an IP what steps do I need to take to ensure IP connection

Serial Interface with Rev E

Hello.

First I used Rev B for an application which needs two serial ports.
One for communication with an other device, the second for flash and monitor and CLI.

But with Rev E Uart2 is not usable because Pin 17 is clock output for ETH
and Pins for Uart1 seem to be used for internal purpose.

Is there any solution for this problem.

Thank for any ideas.

UART1

ESP32_Gateway_Ethernet_v4.0 Compile Error: tcpip_adapter.h: No such file or directory

I recently installed ESP-IDF. I can't compile the example. I ran the following command from the ESP-IDF terminal:

$ idf.py build
...
C:/Users/khanli/Workspace/ESP32-GATEWAY/SOFTWARE/Newest-board-revisions/ESP32_Gateway_Ethernet_v4.0/main/ethernet_example_main.c:13:10: fatal error: tcpip_adapter.h: No such file or directory
   13 | #include "tcpip_adapter.h"
      |          ^~~~~~~~~~~~~~~~~
compilation terminated.
[832/841] Performing configure step for 'bootloader'-- Building ESP-IDF components for target esp32
-- Project sdkconfig file C:/Users/khanli/Workspace/ESP32-GATEWAY/SOFTWARE/Newest-board-revisions/ESP32_Gateway_Ethernet_v4.0/sdkconfig
-- Adding linker script C:/Users/khanli/esp/esp-idf/components/soc/esp32/ld/esp32.peripherals.ld
-- App "bootloader" version: v5.0.1
-- Adding linker script C:/Users/khanli/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.ld
-- Adding linker script C:/Users/khanli/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.api.ld
-- Adding linker script C:/Users/khanli/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.libgcc.ld
-- Adding linker script C:/Users/khanli/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.newlib-funcs.ld
-- Adding linker script C:/Users/khanli/esp/esp-idf/components/bootloader/subproject/main/ld/esp32/bootloader.ld
-- Adding linker script C:/Users/khanli/esp/esp-idf/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld
-- Components: bootloader bootloader_support efuse esp_app_format esp_common esp_hw_support esp_rom esp_system esptool_py freertos hal log main micro-ecc newlib partition_table soc spi_flash xtensa
-- Component paths: C:/Users/khanli/esp/esp-idf/components/bootloader C:/Users/khanli/esp/esp-idf/components/bootloader_support C:/Users/khanli/esp/esp-idf/components/efuse C:/Users/khanli/esp/esp-idf/components/esp_app_format C:/Users/khanli/esp/esp-idf/components/esp_common C:/Users/khanli/esp/esp-idf/components/esp_hw_support C:/Users/khanli/esp/esp-idf/components/esp_rom C:/Users/khanli/esp/esp-idf/components/esp_system C:/Users/khanli/esp/esp-idf/components/esptool_py C:/Users/khanli/esp/esp-idf/components/freertos C:/Users/khanli/esp/esp-idf/components/hal C:/Users/khanli/esp/esp-idf/components/log C:/Users/khanli/esp/esp-idf/components/bootloader/subproject/main C:/Users/khanli/esp/esp-idf/components/bootloader/subproject/components/micro-ecc C:/Users/khanli/esp/esp-idf/components/newlib C:/Users/khanli/esp/esp-idf/components/partition_table C:/Users/khanli/esp/esp-idf/components/soc C:/Users/khanli/esp/esp-idf/components/spi_flash C:/Users/khanli/esp/esp-idf/components/xtensa
-- Configuring done
-- Generating done
-- Build files have been written to: C:/Users/khanli/Workspace/ESP32-GATEWAY/SOFTWARE/Newest-board-revisions/ESP32_Gateway_Ethernet_v4.0/build/bootloader
ninja: build stopped: subcommand failed.
HINT: Please make sure that the header name is correct. Also please check if you've specified all component dependencies with 'idf_component_register(REQUIRES ...)'. If the component is not present then it should be added by the IDF Component Manager. For more information run 'idf.py docs -sp api-guides/build-system.html'.
Also, please check if the header file has been removed, renamed or relocated - refer to the migration guide for more information.
ninja failed with exit code 1, output of the command is in the c:\users\khanli\workspace\esp32-gateway\software\newest-board-revisions\esp32_gateway_ethernet_v4.0\build\log\idf_py_stderr_output_23280 and c:\users\khanli\workspace\esp32-gateway\software\newest-board-revisions\esp32_gateway_ethernet_v4.0\build\log\idf_py_stdout_output_23280

No Code in software folder

Hi there is no code in the software folder of the repo?
Is this an error form my side or the software/samples are not ready yet

ble scan performance?

Are there any testing results with this gateway? I'm specifically interested in how much BLE devices can be scanned in a 2-5 second interval.
I have my own esp32 gateway which only scans 10-30beacons in 2sec scanning period, while there is 60+ beacons nearby.

** If I disable WIFI, the BT scan works perfectly, this is a known ESP32 problem.

Ethernet support

Just added a week ago, the documentation at:

https://github.com/OLIMEX/ESP32-GATEWAY/tree/master/SOFTWARE/Newest-board-revisions/ESP32_Gateway_Ethernet_v4.0

Is not correct, there is no support for LAN8720 in the SDK.

Also how to make it work with the GPIO0/17 clock mode since it was removed from the sdk v4?

Esp32 router

Hi,

Will you provide example project where it functions as a NAT router?

Rev C board does not work with ETH_PHY_demo out of the box

Installed esp-idf v3.1 SDK and the xtensa-exp32-elf toolchain. Cloned the ESP32-GATEWAY project. Built the ETH_PHY_demo with the defaults as specified in the README.me file, and flashed the board. Board is coming up, sees the link is up, but never DHCPs an address. A couple of other Ethernet devices I have correctly DHCP on this same cable.

Green LED is on solid, yellow LED is blinking.

Do any changes need to be made to the configuration between the rev B and rev C versions?

Edit: Board is connected to a gigabit switch, but I also tried a 10/100 switch. Same problem.

$ make monitor
MONITOR
--- WARNING: Serial ports accessed as /dev/tty.* will hang gdb if launched.
--- Using /dev/cu.usbserial-1430 instead...
--- idf_monitor on /dev/cu.usbserial-1430 115200 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
ets Jun  8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x1b (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:5712
ho 0 tail 12 room 4
load:0x40078000,len:9020
load:0x40080000,len:6064
0x40080000: _iram_start at /Users/jcw/Projects/esp-idf/components/freertos/xtensa_vectors.S:1685

entry 0x40080330
0x40080330: _KernelExceptionVector at ??:?

I (30) boot: ESP-IDF v3.1 2nd stage bootloader
I (30) boot: compile time 12:33:38
I (30) boot: Enabling RNG early entropy source...
I (35) boot: SPI Speed      : 40MHz
I (39) boot: SPI Mode       : DIO
I (43) boot: SPI Flash Size : 4MB
I (47) boot: Partition Table:
I (51) boot: ## Label            Usage          Type ST Offset   Length
I (58) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (65) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (73) boot:  2 factory          factory app      00 00 00010000 00100000
I (80) boot: End of partition table
I (84) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x0bd10 ( 48400) map
I (110) esp_image: segment 1: paddr=0x0001bd38 vaddr=0x3ffb0000 size=0x022d0 (  8912) load
I (114) esp_image: segment 2: paddr=0x0001e010 vaddr=0x3ffb22d0 size=0x00000 (     0) load
I (117) esp_image: segment 3: paddr=0x0001e018 vaddr=0x40080000 size=0x00400 (  1024) load
0x40080000: _iram_start at /Users/jcw/Projects/esp-idf/components/freertos/xtensa_vectors.S:1685

I (126) esp_image: segment 4: paddr=0x0001e420 vaddr=0x40080400 size=0x01bf0 (  7152) load
I (138) esp_image: segment 5: paddr=0x00020018 vaddr=0x400d0018 size=0x27718 (161560) map
0x400d0018: _stext at ??:?

I (200) esp_image: segment 6: paddr=0x00047738 vaddr=0x40081ff0 size=0x06fe0 ( 28640) load
0x40081ff0: esp_clk_apb_freq at /Users/jcw/Projects/esp-idf/components/esp32/clk.c:179

I (213) esp_image: segment 7: paddr=0x0004e720 vaddr=0x400c0000 size=0x00000 (     0) load
I (213) esp_image: segment 8: paddr=0x0004e728 vaddr=0x50000000 size=0x00000 (     0) load
I (225) boot: Loaded app from partition at offset 0x10000
I (225) boot: Disabling RNG early entropy source...
I (231) cpu_start: Pro cpu up.
I (235) cpu_start: Starting app cpu, entry point is 0x40080e9c
0x40080e9c: call_start_cpu1 at /Users/jcw/Projects/esp-idf/components/esp32/cpu_start.c:225

I (0) cpu_start: App cpu up.
I (245) heap_init: Initializing. RAM available for dynamic allocation:
I (252) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (258) heap_init: At 3FFBC3A0 len 00023C60 (143 KiB): DRAM
I (264) heap_init: At 3FFE0440 len 00003BC0 (14 KiB): D/IRAM
I (270) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (277) heap_init: At 40088FD0 len 00017030 (92 KiB): IRAM
I (283) cpu_start: Pro cpu start user code
I (301) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (304) system_api: Base MAC address is not set, read default base MAC address from BLK0 of EFUSE
I (304) emac: emac start !!!

I (314) emac: emac reset done
I (454) emac: emac start success !!!
I (4454) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (4454) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (4454) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (4454) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (4464) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (4474) emac: eth link_up!!!
I (6474) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
I (6474) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHIP:0.0.0.0
I (6474) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPMASK:0.0.0.0
I (6474) Olimex_ESP32_GATEWAY_REV_B_eth_example: ETHPGW:0.0.0.0
I (6484) Olimex_ESP32_GATEWAY_REV_B_eth_example: ~~~~~~~~~~~
<repeats endlessly>

Maximum number of bluetooth pairing

My issue is less of an issue and more of question, what is the maximum number of bluetooth devices that can be paired to a single ESP32 board?

ETH_PHY_demo doesn't build

The network classes have changed in the espressif esp-ide git and the example no longer builds.

ESP32-GATEWAY/SOFTWARE/Newest-board-revisions/ETH_PHY_demo/main/ethernet_example_main.c:49:10: fatal error: eth_phy/phy_lan8720.h: No such file or directory #include "eth_phy/phy_lan8720.h"

Could you adapt the examples to the new toolchain?

I2S codec?

Not an issue, just a question.

Is it possible to attach i2s audio in/out codec to ESP32-GATEWAY without clocking and pin assignment conflicts with EMAC? Something like Cirrus/Wolfson WM8731 audio ADC/DAC?

Cant find "Use LAN8720" in "Support SPI to Ethernet Module" and then in that submenu check

I am using esp-idf to flash the ESP32_Gateway_Ethernet_v4.0 to an Olimex-ESP32-gateway. I followed the instructions and at menuconfig step, I did not find the LAN8720 module in the "support SPI to ethernet module" submenu.

Any ideas?

SD Card example only works with 1-bit mode, not 4-bit

If I choose to use 4-bit mode by commenting out the line:
host.flags = SDMMC_HOST_FLAG_1BIT;

Then I get the following errors:

I (0) cpu_start: Starting scheduler on APP CPU.
I (324) example: Initializing SD card
I (324) example: Using SDMMC peripheral
I (334) gpio: GPIO[13]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0
E (374) sdmmc_sd: sdmmc_check_scr: send_scr returned 0xffffffff
E (374) example: Failed to mount filesystem. If you want the card to be formatted, set format_if_mount_failed = true.

1-bit mode works fine. Is something else necessary in order to use 4-bit mode? The schematic shows all 4 bits being connected. I am using a Rev. G board.

Ethernet activity indicator flashes constantly when using wifi softAP

The yellow ethernet activity indicator flashes constantly when using softAP, even when sending or receiving no data. This may be a hardware problem specific to the boards I'm using, which are Olimex Gateway and Olimex PoE, I don't have access to any other ESP32 boards with ethernet.
Both ethernet and softAP still work fine, so it's not exactly a huge problem. I don't actually know whether it indicates some kind of network activity or if the light is just flashing for no reason.
Below is a minimal PoC to make it happen (for IDF master), which just uses the same code as the softAP and ethernet examples:

#include <esp_eth.h>
#include <esp_eth_mac.h>
#include <esp_eth_phy.h>
#include <esp_log.h>
#include <esp_netif.h>
#include <esp_netif_defaults.h>
#include <esp_netif_types.h>
#include <esp_wifi.h>
#include <nvs_flash.h>


void internal_flash_init() {
    esp_err_t err = nvs_flash_init();
    if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
        ESP_ERROR_CHECK(nvs_flash_erase());
        err = nvs_flash_init();
    }
    ESP_ERROR_CHECK(err);
}

void ethernet_init(void) {
    esp_netif_config_t cfg = ESP_NETIF_DEFAULT_ETH();
    esp_netif_t *eth_netif = esp_netif_new(&cfg);
    ESP_ERROR_CHECK(esp_eth_set_default_handlers(eth_netif));
    eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG();
    esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&mac_config);
    eth_phy_config_t phy_config = ETH_PHY_DEFAULT_CONFIG();
    phy_config.phy_addr = 0;
    esp_eth_phy_t *phy = esp_eth_phy_new_lan8720(&phy_config);
    esp_eth_config_t config = ETH_DEFAULT_CONFIG(mac, phy);
    esp_eth_handle_t eth_handle = NULL;
    ESP_ERROR_CHECK(esp_eth_driver_install(&config, &eth_handle));
    ESP_ERROR_CHECK(esp_netif_attach(eth_netif, eth_handle));
}

void wifi_softap_init(void) {
    esp_netif_create_default_wifi_ap();
    wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT();
    ESP_ERROR_CHECK(esp_wifi_init(&cfg));
    ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_AP));
    wifi_config_t wifi_config = {.ap = {.authmode = WIFI_AUTH_OPEN, .max_connection=5,}};
    ESP_ERROR_CHECK(esp_wifi_set_config(ESP_IF_WIFI_AP, &wifi_config));
    ESP_ERROR_CHECK(esp_wifi_start());
}

void app_main() {
    internal_flash_init();
    esp_netif_init();
    ESP_ERROR_CHECK(esp_event_loop_create_default());
    ethernet_init();
    wifi_softap_init();
}

The ethernet is configured in the sdkconfig.defaults file:

CONFIG_ETH_ENABLED=y
CONFIG_ETH_USE_ESP32_EMAC=y
CONFIG_ETH_PHY_INTERFACE_RMII=y
CONFIG_ETH_RMII_CLK_OUTPUT=y
CONFIG_ETH_RMII_CLK_OUT_GPIO=17
CONFIG_ETH_SMI_MDC_GPIO=23
CONFIG_ETH_SMI_MDIO_GPIO=18

Revision F hardware

I recently bought a esp32 gateway revision F, but I am unable to find the correct schematics for that revision.
At least the pinout is different, but are there any other changes?

Error when open project with Kicad version 4.0.6

Dear Olimex,

I downloaded your hardware design and open project with Kicad v4.0.6 (newest).
But when I try to open kicad_pcb file. I receive an "error loading board. Kicad was unable to open this file... Date of kicad required (or newer): 01/23/2017"
Please help me how i can open this file. What version of kicad you are using.
Thanks alot.

Broken links

Several broken links in the section "upper level" at

https://github.com/OLIMEX/ESP32-GATEWAY/tree/master/SOFTWARE/Newest-board-revisions/ESP32_Gateway_Ethernet_v4.0

Ethernet not working properly?

Trying to get the Gateway up with the ESP32-EVB PHY Example

1. i need to enable the layer 2->3 copy in the phy settings or i get emac rx error!! on every packet on ethernet
2. the board is not getting any dhcp address, sniffing the ethernet i not even see an outgoing dhcp request

any ideas?

Using two SPI buses

I'm trying to configure an ESP32-Gateway to talk with an SPI device. I feel I must be missing something about the hardware configuration.

I've started with the SPI_Multiple_Buses example code, but the default pins for VSPI (18,19,23,5) and HSPI (14,12,13,15) are mostly not exposed to the extension headers. Consulting the schematic (I'm using a rev C) I have access to
GPIO 5,16,17,32,33
GPI 34,35,36,39
Debug only 6,7,8,9,10,11

I've verified I can see SPI signals on the 5 pins I have access to, I'm explicitly told to skip the 6 SD-related pins, and the other 4 are input only? That seems like a waste of header real estate, and how can one operate two SPI buses concurrently (alternatively this would limit the number of SS pins for a single SPI bus)?

Probably some trivial ignorance on my part?

Power consumption for Deep sleep mode

Hi
Have you ever measured power consumption of the device on deep sleep mode?
Could you provide the measurement result?