openwch / ch569

SDK sch&layout reference design and datasheet documention

32-bit High Performance High-speed interface MCU CH569

EN | 中文

Overview

CH569 and CH565 are based on RISC-V3A core, and support the IMAC subset of RISC-V instructions. The chip integrates super-high-speed USB3.0 host and device controller (built-in PHY), Gigabit Ethernet controller, dedicated high-speed SerDes controller (built-in PHY, can drive optical fiber directly), high-speed parallel interface (HSPI), digital video port (DVP), SD/EMMC interface controller and encryption/decryption module. The DMA with width of 128 bits can ensure high-speed transfer of large amounts of data. CH569/CH565 can be widely used in streaming media, instant storage, super-high-speed USB3.0 FIFO, communication extension, security monitor and other applications.

System Block Diagram

Features

• RISC-V core, 120MHz system clock frequency. Single-cycle multiplication and hardware division. Programmable interrupt controller. Low-power two-stage pipeline;
• 448KB Code Flash, 32KB DataFlash, 16KB SRAM with width of 32 bits, 32/64/96KB configurable SRAM with width of 128 bits;
• Built-in super-high-speed USB3.0 controller and transceiver (built-in PHY). USB3.0 Host/Device mode. OTG capability. Support USB3.0 HUB;
• Built-in high-speed USB2.0 controller and transceiver (built-in PHY). USB2.0 Host/Device mode. Control/bulk/interrupt/synchronous transfer;
• Built-in gigabit Ethernet controller (Ethernet). Provide RGMII and RMII PHY interface. 10/100/1000Mbps transfer rate;
• Built-in digital video port (DVP). Data width can be configured as 8/10/12 bits. Support YUV, RGB, JPEG compressed data;
• Built-in high-speed parallel interface (HSPI). Data width can be configured as 8/16/32 bits. Built-in FIFO. DMA capability. The maximum transfer speed can reach around 3.8Gbps;
• Built-in SerDes controller and transceiver (built-in PHY, can drive optical fiber directly). Support network cable transfer distance of 90 meters (only use one set of differential line). Support 1.25Gbps high-speed differential signal communication;
• Built-in EMMC controller. Support single-wire/4-wire/8-wire data communication mode. Comply to EMMC Specification Rev. 4.4 and Rev. 4.5.1, compatible with Specification Rev. 5.0;
• Support AES/SM4 algorithm. 8 types of combinations for encryption/decryption modes. Support encryption/decryption of SRAM/EMMC/HSPI data;
• 4 UARTs. Baud rate can be up to 6Mbps. Compatible with 16C550. Built-in FIFO. Multiple trigger levels;
• 2 SPIs. Master/Slave mode. Built-in FIFO. DMA capability;
• Active parallel port: 8-bit data, 15-bit address bus;
• 3 x 26-bit timers. Support timing, count, signal capture, PWM output, 4 expanded PWM outputs. Adjustable duty cycle;
• 49 general-purpose IOs. 8 settable level/edge interrupts. Some pins have alternate and map functions;
• Built-in watchdog, which integrates 2-wire debug interface and supports emulate online;
• Low-power mode. Support wake up some GPIOs, USB and Ethernet signal;
• Chip ID: unique 64-bit ID;
• Package: QFN68, QFN40.

ch569's Issues

Tools for Linux

There is some templates for linux users with libs and makefiles?

thanks in advance!

An oppurtunity

Hello, just wanted to point out that hydrausb has reverse engineered the usb (and also serdes) closed source drivers (teenyusb as well I believe). I understand wanting to keep sum stuff secret but that cat is out of the bag, any usb secrets are out in the wild albeit in not the most easiest formfactor. So with no more usb secrets it would make a lot of sense to add tbe usb sections to the datasheet? Think about it the only difference between doing that and not doing that is how easily your customers can use your products.
Also as it stands we have a buggy closed source driver that has never been updated since its release, no docs on usb peripheral or its closed source driver, and 2 fairly niche usbd examples that leave A LOT of required info for basic things in the dark. This can leave a bad taiste in peoples mouths. But if you release the docs it null and voids those points.
Just want to reiterate with usb secrets exposed the only difference in releasing/not releasing the docs is how difficult it is for us to use your products. I think this makes sense for you and us. Thank you for your time and your very cool products! Please please release the info, I really want to use these boards I have with a reasonable amount of effort.

Reference manual

Hello,

is there reference manual for this chip ?

Manual/example for serdes

Hello
In datasheet there is reference to call functions for serdes,. There is no register description and no mentions in the EVT about serdes. Do you plan to release the library that can utilize serdes feature of this mcu?

Thank you