Name: Shun OSAFUNE
Type: User
Company: J-7SYSTEM WORKS LIMITED
Bio: Hardware engineer of J-7SYSTEM WORKS LIMITED. My main task is FPGA design. I'm writing an application with JavaScript, Python, Lua and C.
Twitter: s_osafune
Location: Osaka, JAPAN
Blog: http://j-7system.blog.so-net.ne.jp/
Shun OSAFUNE's Projects
Card shape FPGA board
PERIDOT board driver for Chrome App
IntelFPGA configuration & Avalon-MM access library for FlashAir
for DE0 / NiosII reference system
DE0用 NiosIIプラットフォーム
Simple CameraLink frame-grabber
FM/PCM test signal generator
HDMI Transmitter IP Core
This is a clone of an SVN repository at svn://svn.code.sf.net/p/ixo-jtag/code. It had been cloned by http://svn2github.com/ , but the service was since closed. Please read a closing note on my blog post: http://piotr.gabryjeluk.pl/blog:closing-svn2github . If you want to continue synchronizing this repo, look at https://github.com/gabrys/svn2github
MAX10 Serial config updater
MCPU - A Minimal 8Bit CPU in a 32 Macrocell CPLD
Simple-to-use C library to play X68000 MDX chiptunes
release 1
Qsys/SoPC Builder用 MMC/SDカードSPIペリフェラル(リードDMA付き) + FatFS on HAL
AvalonMM用 MMC/SDカードSPIペリフェラル+ファイルシステム
An embeddable Javascript interpreter in C.
A script that automates the setup of the NiosII SBT