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9.0 22.0 1.0 27.58 MB

Pothos FPGA computational offload and buffer integration support

Home Page: https://github.com/pothosware/PothosFPGA/wiki

VHDL 70.94% Python 0.83% Tcl 1.64% C++ 21.55% CMake 5.04%
pothos fpga xilinx stream axi pothos-framework

pothosfpga's Issues

multi-lane outgress module

  • arbitrary number of lanes flow through
  • each lane to splitter using dest bus
  • splitters to combiner for outgress

interconnect module

  • arbitrary lane configurations
  • arbitrary input and output streams
  • configuration protocol

combiner stream block

  • The combiner stream block has many inputs and one output
  • The inputs and outputs follow the RV stream standard (packet aware)
  • Only one input port can be serviced at a time
  • An entire packet must be transferred before another port is serviced

duplicator stream block with enable bits

  • The duplicator block has one input and many outputs.
  • The inputs and outputs use the RV streaming standard (packet aware)
  • The input is duplicated to each output with the associated enable bit set
  • A change in the enable setting cannot affect an ongoing packet transfer

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