princetonuniversity / ilang Goto Github PK

Just to put some thinking here, no big issues.

1. Where is the implementation of this function? BTW, what do you mean by dependant variables of an expression? all the variables used in the expression or all states/inputs from its host?

https://github.com/Bo-Yuan-Huang/ILA-Tools/blob/64797807f1ac318e22d48c18568e9f9ca4cabc08/include/backend/abs_knob.h#L15

2. There are some places that use constant shared pointers as function arguments (below is an example), I was wondering why not constant reference of shared pointers, so we avoid copying shared pointer and updating its reference count.

https://github.com/Bo-Yuan-Huang/ILA-Tools/blob/64797807f1ac318e22d48c18568e9f9ca4cabc08/include/ila/ast/sort.h#L61

3. For the Sort, why use int instead of unsigned for bit_width and etc? They must not be negative, anyway.

https://github.com/Bo-Yuan-Huang/ILA-Tools/blob/64797807f1ac318e22d48c18568e9f9ca4cabc08/include/ila/ast/sort.h#L45

Is your feature request related to a problem? Please describe.
Building and installing on systems with multiple versions of Boost, Python, etc. can be still non-trivial.

Describe the solution you'd like
Provide a Docker image with ILAng installed for easy development.

Describe alternatives you've considered
Virtual machine image.

Additional context
N/A

Describe the bug
Build fail under Release model.

To Reproduce
Steps to reproduce the behavior:

1. cmake .. -DCMAKE_BUILD_TYPE=Release
2. make
3. See error

Expected behavior

ILAng/src/verilog-in/verilog_analysis.cc: In member function ‘void ilang::VerilogAnalyzer::check_resolve_modules(verilog_source_tree*)’:
ILAng/src/verilog-in/verilog_analysis.cc:135:68: error: invalid use of void expression
    PrintMetaAst(ILA_ERROR << "Redeclaration of module @", module) 

ILAng/src/verilog-in/verilog_analysis.cc: In member function ‘ilang::VerilogAnalyzer::hierarchical_name_type ilang::VerilogAnalyzer::_check_hierarchical_name_type(const string&) const’:
ILAng/src/verilog-in/verilog_analysis.cc:355:35: error: invalid use of void expression port_id_ptr); 
ILAng/src/verilog-in/verilog_analysis.cc:380:34: error: invalid use of void expression reg_decl_ptr);
ILAng/src/verilog-in/verilog_analysis.cc:404:34: error: invalid use of void expression net_decl_ptr);

Environment (please complete the following information):

• OS: Ubuntu 16.04
• Compiler [e.g. gcc 5.4.0]

Is your feature request related to a problem? Please describe.
Current markdown files are not up-to-standard.

Describe the solution you'd like
Remove vulnerable patterns in the markdown files.

Additional context
Codacy-markdown-issues

Is your feature request related to a problem? Please describe.
Provide an up-to-standard Dockerfile for the ILAng developing environment.

Describe the solution you'd like

• Locate the docker file in the scripts/default directory with the latest tag.
• Register auto-build in Docker hub.

Describe alternatives you've considered

• Integrate docker image deployment with one of the CI services.

Additional context

• Codacy-dockerfile-issues

Describe your feature request.
No CoreIR integration or translation is supported now. It'd be nice to have a conversion feature to better utilize the existing features of the CoreIR, e.g., Verilog generation and formal reasoning.

Describe the solution you'd like
Utilize the CoreIR API to generate the context module of the corresponding ILA models.

Additional context
Out-of-source embedding is perhaps a better choice here.

• Ensure license statements
• Formatting
• Resolve static analysis issues
• Resolve coding convention conflicts

Describe the bug
Build fail under Release model.

To Reproduce
Steps to reproduce the behavior:

1. cmake .. -DCMAKE_BUILD_TYPE=Release
2. make
3. See error

Expected behavior
A clear and concise description of what you expected to happen.

ILAng/src/mcm/axiom_helper.cc: In member function ‘z3::expr ilang::MemoryModel::SameAddress(const ilang::TraceStep&, const ilang::TraceStep&, const string&, ilang::MemoryModel::AxiomFuncHint, ilang::MemoryModel::AxiomFuncHint) const’:
ILAng/src/mcm/axiom_helper.cc:414:30: error: invalid use of void expression wexpr->Print(ILA_INFO); 

Environment (please complete the following information):

• OS: Ubuntu 16.04
• Compiler gcc 5.4.0

Is your feature request related to a problem? Please describe.
No software model for the ILA available.

Describe the solution you'd like
Automatically generate a C/C++ simulator (software model) for the ILA model.

Describe alternatives you've considered
Reuse part of the legacy code from the synthesis engine.

Additional context
Need to accommodate verification requirements, e.g., CBMC.

Is your feature request related to a problem? Please describe.
Low coverage on Verilog target generation test. PR #41

Describe the solution you'd like
Add more detailed unit tests for the target generation, especially function apply.

Describe alternatives you've considered
Reduce code duplication and reuse as much as possible.

Additional context
N/A

Is your feature request related to a problem? Please describe.
Current CMake build options are (mostly) based on dependencies. Similarly for code structure.

Describe the solution you'd like

• Restructure the code directories and build options so that they are designed based on functionality. This seems more reasonable for users.
• Make each functionality (units) an independent build target (library). This can better localize dependencies within each unit.

Describe alternatives you've considered
Only one default build configuration.

Describe the bug
The CMake recipe does not support build using Clang when enabling coverage flags.

To Reproduce
Steps to reproduce the behavior:

1. mkdir -p build
2. cd build
3. export CC=clang
4. export CXX=clang++
5. cmake .. -DILANG_BUILD_COV=ON -DCMAKE_BUILD_TYPE=Debug
6. make

Expected behavior
Compile errors as below (selected):

CMakeFiles/unit_tests.dir/t_unroll_seq.cc.o: In function `__llvm_gcov_writeout':
t_unroll_seq.cc:(.text+0xed9f): undefined reference to `llvm_gcda_start_file'
t_unroll_seq.cc:(.text+0xee02): undefined reference to `llvm_gcda_emit_function'
t_unroll_seq.cc:(.text+0xee20): undefined reference to `llvm_gcda_emit_arcs'
t_unroll_seq.cc:(.text+0xee3b): undefined reference to `llvm_gcda_summary_info'
t_unroll_seq.cc:(.text+0xee40): undefined reference to `llvm_gcda_end_file'
CMakeFiles/unit_tests.dir/t_unroll_seq.cc.o: In function `__llvm_gcov_init':

Desktop (please complete the following information):

• OS: Ubuntu
• Version: Xenial (16.04 LTS)

Is your feature request related to a problem? Please describe.
The current template is not suitable for this project.

Describe the solution you'd like
Include only commonly-used info.

Is your feature request related to a problem? Please describe.
Coverity has been turned down for maintenance and updates. It's now relaunched and we should re-activate the service.

Describe the solution you'd like
Set-up Travis CI integration for the master branch.

Describe alternatives you've considered
We can only trigger on Coverity branch.

Additional context
N/A

Should line 13 in papers/common_issues/code/timingExample.py be b1 instead of b0?

Is your feature request related to a problem? Please describe.
Build fail under z3 4.4.0, 4.4.1, and 4.5.0 (at least) due to z3 API upgrade.

Describe the solution you'd like
Support with compile flags.

Describe alternatives you've considered
Config time error for older versions.

Additional context
z3 4.4.0 and 4.4.1 are the canonical version shipped with Ubuntu 16.04 and 18.04, respectively. It would be better to have support for better usability and efficient CI turn-around.

Is your feature request related to a problem? Please describe.
When z3 cannot be found, CMake configuration would fail in finding Google Log in continued configuration (without a clean remove).

Describe the solution you'd like
Use subtrees for stable external packages.

Is your feature request related to a problem? Please describe.
Would be more accessible for users, especially with the synthesis engine.

Describe the solution you'd like
Export an archive-able file (either human readable or machine readable) for ILA models.

Describe alternatives you've considered
JSON input parser and the output engine has pretty great supports.

Additional context
N/A

Is your feature request related to a problem? Please describe.
N/A

Describe the solution you'd like
A Docker image with the latest dependencies (e.g., z3, Boolector, abc, etc.)

Is your feature request related to a problem? Please describe.
Rename cpp_api.h to ilang++.h to avoid confusion, as requested in #35.

Describe the solution you'd like
Rename the file and fix all other dependencies.

Describe alternatives you've considered
N/A

Additional context
N/A

This issue is related to the hash function used in src/ila/hash_ast.cc

The test is provide in this pull request (but I don't expect you to merge it, because the test will most likely fail).

In the test constructed, in each round there are

• 512x ITE nodes
• 512x EQ nodes
• 1x BitVectorVar node
• 1024x BvConst nodes

The BvConst nodes are the same for each round, so they should not result in different
hashes, and will be replaced by the same BvConst node as the first round.
So in the i-th round, there will be 1025*i + 1024 AST nodes (assuming i starts from 0)

So in 10000 rounds, there will be around 10^7 AST nodes.

According to table here, the collision probability for a 64-bit hash with 1.9x10^7 hash values is 10^-5. However, I was never able to finish this test without errors (you can also try it yourself). If it is not a hash-function design problem, I think we should go to buy lottery.

capture-output bin/test_mem.test/gcc-4.8/debug/cpp11-on/test_mem
====== BEGIN OUTPUT ======
iram (type mem 8 8)
(readmem iram addr) (type bitvector 8)
(+ (readmem iram addr) 0x1) (type bitvector 8)
(store iram addr (+ (readmem iram addr) 0x1)) (type mem 8 8)

(select iram addr)
(bvadd #x01 (select iram addr))
[default: 0xFF]
[0x80:0x0 0x81:0x1 0x82:0x2 0x83:0x3 0x84:0x4 0x85:0x5 0x86:0x6 0x87:0x7 0x88:0x8 0x89:0x9 0x8A:0xA 0x8B:0xB 0x8C:0xC 0x8D:0xD 0x8E:0xE 0x8F:0xF default: 0xFF]
[0x80:0x0 0x81:0x1 0x82:0x2 0x83:0x3 0x84:0x4 0x85:0x5 0x86:0x6 0x87:0x7 0x88:0x8 0x89:0x9 0x8A:0xA 0x8B:0xB 0x8C:0xC 0x8D:0xD 0x8E:0xE 0x8F:0xF default: 0xFF]
[0x80:0x0 0x81:0x1 0x82:0x2 0x83:0x3 0x84:0x4 0x85:0x5 0x86:0x6 0x87:0x7 0x88:0x8 0x89:0x9 0x8A:0xA 0x8B:0xB 0x8C:0xC 0x8D:0xD 0x8E:0xE 0x8F:0xF default: 0x0]
[(128, 0), (129, 1), (130, 2), (131, 3), (132, 4), (133, 5), (134, 6), (135, 7), (136, 8), (137, 9), (138, 10), (139, 11), (140, 12), (141, 13), (142, 14), (143, 15)]
(define-fun addr () (_ BitVec 8)
#x00)
false
true
python: /usr/include/z3++.h:804: z3::expr::operator Z3_app() const: Assertion `is_app()' failed.
Aborted (core dumped)

EXIT STATUS: 134
====== END OUTPUT ======

LD_LIBRARY_PATH="/home/runner/ILA-Tools/py-tmpl-synth/bin/gcc-4.8/debug/cpp11-on:/usr/bin:/usr/lib:/usr/lib32:/usr/lib64:$LD_LIBRARY_PATH"

export LD_LIBRARY_PATH

PYTHONPATH="bin/gcc-4.8/debug/cpp11-on"

export PYTHONPATH
"python" "test/mem.py" > "bin/test_mem.test/gcc-4.8/debug/cpp11-on/test_mem.output" 2>&1
status=$?
echo >> "bin/test_mem.test/gcc-4.8/debug/cpp11-on/test_mem.output"
echo EXIT STATUS: $status >> "bin/test_mem.test/gcc-4.8/debug/cpp11-on/test_mem.output"
if test $status -eq 0 ; then
cp "bin/test_mem.test/gcc-4.8/debug/cpp11-on/test_mem.output" "bin/test_mem.test/gcc-4.8/debug/cpp11-on/test_mem"
fi
verbose=0
if test $status -ne 0 ; then
verbose=1
fi
if test $verbose -eq 1 ; then
echo ====== BEGIN OUTPUT ======
cat "bin/test_mem.test/gcc-4.8/debug/cpp11-on/test_mem.output"
echo ====== END OUTPUT ======
fi
exit $status

...failed capture-output bin/test_mem.test/gcc-4.8/debug/cpp11-on/test_mem...

Is your feature request related to a problem? Please describe.
Avoid including logging macros in the headers for users.

Describe the solution you'd like
Use only when needed, i.e., in sources.

Additional context
Since macros are not guarded by namespace, it prevents conflicts for user integration.

Describe your feature request.
Current build and tests are Linux-based environments only. The behavior under Windows (Visual Studio) is unknown.

Describe the solution you'd like
Code modification and CI tests support.

Additional context
N/A

Is your feature request related to a problem? Please describe.
Add CI test for Ubuntu 16.04 with GCC 4.9 or above (#35).

Describe the solution you'd like
Add one more test matrix.

Describe alternatives you've considered
N/A

Additional context
N/A

Describe the bug
The docker image of POSH demo fails to build due to the synthesis engine. (Docker file disable the synthesis engine integration while the c++ API links to the converter.)

To Reproduce
Steps to reproduce the behavior:

1. Build the docker normally
2. Fail to find the synthesized abstraction conversion feature.

Environment (please complete the following information):

• OS: Ubuntu 18.04
• Compiler gcc 7.3.0

Additional context
N/A

• feature complete as per TACAS19 description
• well-founded tests and analysis
• update stable external packages (as subtrees)

Hornified ILA uses (_ BitVec n) to modeled bit vectors. Somehow this causes an extremely heavy cost for the SMT solver when model checking the firmware/hardware co-verification problem. Try to use Int for bit vectors instead.

Homebrew Bison seems to be updated to a more stable version. Test the CI scripts with the latest package.

Describe the bug

1. First I don't think we really need verilogparser's headers to work, because there is a wrapper around it, see include/ilang/verilog-in/verilog_analysis_wrapper.h, it does not include any verilogparser header.
2. The paths of the verilog parser's header are strange: double include, include/include
3. BTW, I'd like to ask (till now I still don't understand), why renaming cpp_api.h to ila++.h, why not just put it as ila++.h, so examples need less modification if we want them to work both before and after installation (just change the path in the makefile) (Now when I plan to write an example, I had to ask myself, do I want it to work before installation or using the installation headers and which to include and get stuck right at the first line)
4. BTW, due to the changes of paths of include/library paths and etc. our old examples (e.g. apps/riscv-spec) would not work.
5. BTW, I do recommend using Ubuntu 16.04 and at least GCC 4.9 or above in Travis Cl.
6. The ilang headers other than the ila++.h are not installed.
7. BTW, the pull request check is good that it ensures compilability, but now if I want to keep developing while a pull request is pending, I cannot push to the branch for pull request, as it automatically include all future pushes before pull request is resolved. Okay, one branch for development and one branch for pull request could work. And so will come the merges here and there, if there is not enough already. My recommendation is disable it while in the period of intense development. We don't have that much time wasting on it.

To Reproduce

• cmake, make, and then make install

Expected behavior

• avoid verilogparser header installation
• install some ilang headers, maybe?

Screenshots

-- Install configuration: ""
-- Installing: /usr/local/lib/cmake/ilang/ilangConfig.cmake
-- Installing: /usr/local/lib/cmake/ilang/ilangConfigVersion.cmake
-- Installing: /usr/local/lib/cmake/ilang/ilangTargets.cmake
-- Installing: /usr/local/lib/cmake/ilang/ilangTargets-noconfig.cmake
-- Installing: /usr/local/lib/libglog.a
-- Installing: /usr/local/include/glog/logging.h
-- Installing: /usr/local/include/glog/raw_logging.h
-- Installing: /usr/local/include/glog/stl_logging.h
-- Installing: /usr/local/include/glog/vlog_is_on.h
-- Installing: /usr/local/include/glog/log_severity.h
-- Installing: /usr/local/lib/cmake/glog/glog-config.cmake
-- Installing: /usr/local/lib/cmake/glog/glog-config-version.cmake
-- Installing: /usr/local/lib/cmake/glog/glog-targets.cmake
-- Installing: /usr/local/lib/cmake/glog/glog-targets-noconfig.cmake
-- Installing: /usr/local/lib/cmake/verilogparser/verilogparserConfig.cmake
-- Installing: /usr/local/lib/cmake/verilogparser/verilogparserConfigVersion.camke
-- Installing: /usr/local/lib/cmake/verilogparser/verilogparserTargets.cmake
-- Installing: /usr/local/lib/cmake/verilogparser/verilogparserTargets-noconfig.cmake
-- Installing: /usr/local/lib/libverilogparser.a
-- Installing: /usr/local/bin/parser
-- Installing: /usr/local/include/include
-- Installing: /usr/local/include/include/verilog_ast_mem.h
-- Installing: /usr/local/include/include/verilog_ast.h
-- Installing: /usr/local/include/include/verilog_parser.h
-- Installing: /usr/local/include/include/verilog_ast_common.h
-- Installing: /usr/local/include/include/verilog_ast_util.h
-- Installing: /usr/local/include/include/verilog_preprocessor.h
-- Installing: /usr/local/lib/cmake/ilasynth/ilasynthConfig.cmake
-- Installing: /usr/local/lib/cmake/ilasynth/ilasynthConfigVersion.cmake
-- Installing: /usr/local/lib/cmake/ilasynth/ilasynthTargets.cmake
-- Installing: /usr/local/lib/cmake/ilasynth/ilasynthTargets-noconfig.cmake
-- Installing: /usr/local/lib/libilasynthAst.a
-- Installing: /usr/local/lib/libilasynth.a
-- Installing: /usr/local/include/ilasynth
-- Installing: /usr/local/include/ilasynth/ast
-- Installing: /usr/local/include/ilasynth/ast/bitvec.hpp
-- Installing: /usr/local/include/ilasynth/ast/bvinrange.hpp
-- Installing: /usr/local/include/ilasynth/ast/bool.hpp
-- Installing: /usr/local/include/ilasynth/ast/mem.hpp
-- Installing: /usr/local/include/ilasynth/ast/func.hpp
-- Installing: /usr/local/include/ilasynth/ast/hash.hpp
-- Installing: /usr/local/include/ilasynth/ast/choice.hpp
-- Installing: /usr/local/include/ilasynth/ast/node.hpp
-- Installing: /usr/local/include/ilasynth/EqvChecker.hpp
-- Installing: /usr/local/include/ilasynth/ast.hpp
-- Installing: /usr/local/include/ilasynth/exception.hpp
-- Installing: /usr/local/include/ilasynth/simplify.hpp
-- Installing: /usr/local/include/ilasynth/MicroUnroller.hpp
-- Installing: /usr/local/include/ilasynth/smt.hpp
-- Installing: /usr/local/include/ilasynth/common.hpp
-- Installing: /usr/local/include/ilasynth/util.hpp
-- Installing: /usr/local/include/ilasynth/horn.hpp
-- Installing: /usr/local/include/ilasynth/boogie.hpp
-- Installing: /usr/local/include/ilasynth/abstraction.hpp
-- Installing: /usr/local/include/ilasynth/funcReduct.hpp
-- Installing: /usr/local/include/ilasynth/synrewriter.hpp
-- Installing: /usr/local/include/ilasynth/logging.hpp
-- Installing: /usr/local/include/ilasynth/VerilogExport.hpp
-- Installing: /usr/local/include/ilasynth/Unroller.hpp
-- Installing: /usr/local/include/ilasynth/assert.hpp
-- Installing: /usr/local/include/ilasynth/imexport.hpp
-- Installing: /usr/local/include/ilasynth/rewriter.hpp
-- Installing: /usr/local/include/ilasynth/cExport.hpp
-- Installing: /usr/local/include/ilasynth/cppsimgen.hpp
-- Installing: /usr/local/include/ilasynth/memvalues.hpp
-- Installing: /usr/local/include/ilasynth/type.hpp
-- Installing: /usr/local/include/ilasynth/exportSMT.hpp
-- Installing: /usr/local/include/ilasynth/synthesizer.hpp
-- Installing: /usr/local/include/ilasynth/genCBMC.hpp
-- Installing: /usr/local/lib/libilang.a
-- Installing: /usr/local/include/ila++.h

Desktop (please complete the following information):

• OS: [Ubuntu 18.04]
• cmake [3.10.2]

On Ubuntu (and maybe other Linux distributions), command ldconfig is needed after *.so is copied to /usr/local/lib/

For the time being I will do this manually in the installation script. But I think in the future, maybe we should include this step in CMAKE recipe or at least mention this in the README.

Describe the bug
Coverage info cannot be found by Coveralls since restructuring.

To Reproduce
Steps to reproduce the behavior:

1. Create a new commit or pull request to trigger CI check.
2. CI engine should send coverage info to Coveralls.

Expected behavior
Coverage info cannot be found (ERROR in CI logs).

Additional context
Since the restructuring, test binary has been moved to another directory.

With the latest release (branch "stable"), the AES Verilog simulator fails to compile.

Describe the bug
Current synthesis engine submodule is configured to an older version that will fail for z3 over 4.8.0.

To Reproduce
Steps to reproduce the behavior:

1. Go to the synthesis engine
2. synthesize model with memory (array).

Expected behavior
z3 assertion fails.

Additional context
Detail of the bug/fix: PrincetonUniversity/ItSy#2 (comment)

Describe your feature request.
To enable easy extending the platform's capability, it'd be nice to have a base AST data structure that allows easy plug-ins for different interpreters.

Describe the solution you'd like
A light-weight AST constructor/travel agent that support easy interpreter plug-ins.

Additional context
Consider the usage of the library on other member's projects.

Describe the bug
Unit tests for Verilog Analyzer fail.

E1209 16:54:47.826284 106335 verilog_analysis.cc:88] Verilog Analyzer cannot open file: test/t_ana.v

To Reproduce
Steps to reproduce the behavior:

1. cmake .. -DCMAKE_BUILD_TYPE=Debug
2. make
3. make run_test
4. See error

Expected behavior
Test fail with a bunch of error message.

[  FAILED  ] 2 tests, listed below:
[  FAILED  ] TestVerilogAnalysis.AnalyzeName
[  FAILED  ] TestVerilogAnalysis.GetTopIo

Screenshots

[0;32m[ RUN      ] �[mTestVerilogAnalysis.AnalyzeName
E1209 21:31:38.374091  7592 verilog_analysis.cc:88] Verilog Analyzer cannot open file: test/t_ana.v
E1209 21:31:38.374111  7592 verilog_analysis.cc:41] VerilogAnalyzer cannot proceed because of being in a bad state
E1209 21:31:38.374121  7592 verilog_analysis.cc:41] VerilogAnalyzer cannot proceed because of being in a bad state
/home/travis/build/Bo-Yuan-Huang/ILA-Tools/test/t_verilog_analysis.cc:72: Failure
Expected equality of these values:
  tp_
    Which is: 0
  VerilogInfo::hierarchical_name_type::O_WIRE_w_INTERNAL_DEF
    Which is: 6
/home/travis/build/Bo-Yuan-Huang/ILA-Tools/test/t_verilog_analysis.cc:74: Failure
Value of: VerilogAnalyzerBase::is_io_sig(tp_)
  Actual: false
Expected: true
/home/travis/build/Bo-Yuan-Huang/ILA-Tools/test/t_verilog_analysis.cc:75: Failure
Value of: VerilogAnalyzerBase::is_wire (tp_)
  Actual: false
Expected: true
E1209 21:31:38.374266  7592 verilog_analysis.cc:41] VerilogAnalyzer cannot proceed because of being in a bad state
/home/travis/build/Bo-Yuan-Huang/ILA-Tools/test/t_verilog_analysis.cc:81: Failure
Expected equality of these values:
  tp_
    Which is: 0
  VerilogInfo::hierarchical_name_type::O_WIRE_w_INTERNAL_DEF
    Which is: 6

Additional context
Starting line 9654 at https://travis-ci.org/Bo-Yuan-Huang/ILA-Tools/builds/465684597

Is your feature request related to a problem? Please describe.
Configure the repo for the lgtm service.

Describe the solution you'd like
Statically analyze the library but not the application.

Additional context

• https://lgtm.com/help/lgtm/configuring-lgtm-analysis-project

Is your feature request related to a problem? Please describe.
It is common that an object for bookkeeping is required when traversing the structure through the visitor. However, the visitor only supports object function with no input argument. This forces the client to create a class merely for the target function.

Describe the solution you'd like
Provide visitor function, as what is provided now, with support for a different number of input arguments.

Describe alternatives you've considered
Can at least provide a set of entry for commonly used bookkeeping object types.

Is your feature request related to a problem? Please describe.
Currently, the case studies and applications are all located in the examples and apps directories.
This makes it harder to perform automatic static analysis, decreases usability (size), and affect readability.

Describe the solution you'd like
Move the finished case studies to the archived repo and pointed by links.

Additional context
We already have a repo for archived case studies.
https://github.com/PrincetonUniversity/ILA-Examples

In order to reduce the cost of memory usage, try exporting ASTs without duplicating shared nodes. Add an interface for exporting multiple ASTs at a time.

Test alu.py and simgen.py (reusing alu.py) will cause a seg fault in the environment with latest Z3.

Is your feature request related to a problem? Please describe.

• When state/input is not found, it crashes without printing the name.
• When the comparison, e.g., Bool vs. int, types do not match, it can try type cast first.

Describe the solution you'd like

• Have warning before crashing.
• Try casting and print warning on type mismatch.

Is your feature request related to a problem? Please describe.
Setup CI check for MS Virtual Studio environment.

Describe the solution you'd like
Host the test to Appveyor.

Describe alternatives you've considered
Create Windows docker image for the manual tests.

Additional context
CMake should be supported in VS build environment.

Describe the bug
Current default (and demo) docker file does not have up-to-date packages, e.g. wget.

To Reproduce
Steps to reproduce the behavior:

1. cd scripts/docker/default
2. docker built -t repro .

Expected behavior
Docker image build fail.

Environment (please complete the following information):

• OS: Ubuntu 18.04

Describe your feature request.
Current CMake recipe only supports static (archive) library installation, which is relatively bigger in terms of package size.

Describe the solution you'd like
Add a config. time option to build and install a shared library.

Additional context
Appropriate compiler features and options should be properly set.

Unit test TestExprOp.Ite

• Z3 4.5.1 -- pass
• Z3 4.7.1 -- fail
• master branch -- pass

Describe the bug
Fail under Apple LLVM when compiling stream buffer in unit tests.

To Reproduce
Steps to reproduce the behavior:

1. Build under OSX and using default build toolchain.

Expected behavior

/Users/travis/build/Bo-Yuan-Huang/ILA-Tools/test/unit-src/../unit-include/stream_buffer.h:13:42: error: reference to type 'const std::string' (aka 'const basic_string<char, char_traits<char>, allocator<char> >') could not bind to an lvalue of type 'const char [7]'
Ila GetStrmBuffSpec(const std::string& name = "SBSpec");

Desktop (please complete the following information):

• OS: OS X 10.13.3
• Compiler: Apple LLVM version 9.1.0 (clang-902.0.39.2)

Describe the bug
Previous examples do not work in the restructured platform (#35).

To Reproduce
Steps to reproduce the behavior:

1. cmake ..
2. make
3. make install
4. make example

Expected behavior
Compile include and link path error.

Additional context
Accommodate to the new example project.

Memory variable will be un-driven when there is no any load/store (MEM_next = MEM).

Is your feature request related to a problem? Please describe.
No up-to-date user manual.

Describe the solution you'd like
Provide a user manual and tutorial (even better the specification).

Additional context
It'd be nice to have both web-version and pdf version.