APIC (Advanced Programmable Interrupt Controller) for x86 kernel.
rcore-os / apic-rs Goto Github PK
View Code? Open in Web Editor NEWRust APIC crate for x86 kernel.
Rust APIC crate for x86 kernel.
Thank you for making this crate that makes OS development easier!
However, I recently used this crate to implement IPI on X2Apic available platforms and noticed that lib.rs
gives a default implementation of the LocalApic
trait:
/// Send an IPI to a remote CPU
fn send_ipi(&mut self, apic_id: u8, int_id: u8) {
self.set_icr((apic_id as u64) << 56 | int_id as u64);
}
Although it works for XApic, the mechanism for X2Apic differs, but the authors do not provide an implementation for that, which should be
fn send_ipi(&mut self, apic_id: u8, int_id: u8) {
// should be 32 instead of 56 :)
self.set_icr((apic_id as u64) << 32 | int_id as u64 | 1 << 14);
}
FYI, Intel's manual says, "The lower 32 bits of ICR in x2APIC mode are identical to the lower half of the ICR in xAPIC mode, except bit 12 (Delivery Status) is not used since it is not needed in X2APIC mode. The destination ID field is expanded to 32 bits in x2APIC mode."
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