Comments (1)
Hi @kwangbaeklee99, thanks for reporting the issue.
We've done some testing based on information you provided as well as included binaries, and it seems that the problem is related to Zephyr configuration rather than simulation itself.
From what we've seen, provided .dts
file is making use of a cadence,gem
compat string, which is currently not supported in Zephyr (and there is no Cadence GEM driver in the tree). There is however driver for xlnx,gem
, but in its current state it doesn't seem to be usable in different context besides ARM platforms (or even ZYNQ-based platforms for that matter).
We've also briefly analyzed binaries that have been included in the issue and they don't seem to include any Cadence-related symbols or driver logic. Are you perhaps using custom fork of Zephyr, that includes extra support for this Ethernet block?
Finally, last problem you encountered is related to clock control, which currently is not modeled for this platform.
Typically, it's not a big issue, though as you can mock necessary parts to make the initialization phase to pass by adding a following snippet to the .repl
file.
sysbus:
init add:
Tag <0x10000004 +4> "ClockControl" 0xffffffff
With this change, binary provided in the issue is running properly, but it is falling back to shell as no default Ethernet is configured.
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