Write VHDL or Verilog and watch it run on a virtual board — flip switches, light LEDs, see it work. Built on GHDL (VHDL) and Icarus Verilog (Verilog), it's designed to give beginning students a simple first step into FPGA design before tackling timing analysis and beyond. Runs standalone on Windows or hosted in a browser.

• Real simulation — your VHDL runs on GHDL and your Verilog on Icarus Verilog, not an approximation; the simulator's own output and errors (file:line included) appear in the console. Drop a .v file, mark it as top, and Start runs the Verilog engine.
• A live DE1-SoC board — clickable switches and pushbuttons, with LEDs and 7-segment displays driven by the simulation.
• A small IDE — file explorer with upload and drag-and-drop, tabbed editor (VHDL and Verilog syntax highlighting), resizable panes.
• Testbenches too — report and assert output prints live from a plain, portless testbench.
• Real-time pacing — simulated time tracks real time, so a design's timing here predicts its timing on the board.

Windows App — download the installer from the Releases page and run it.
The installer is not code-signed, so Windows SmartScreen will show a warning: choose More info → Run anyway.

Web Hosting — host HDLBoard yourself and open it in a browser.
Requirements and step-by-step installation: HOSTING.md.

Building from source, running the dev server, and producing the Windows installer are covered in BUILDING.md.

• BUILDING.md — compile, run and package
• HOSTING.md — host it yourself using Docker,Linux, macOS or Windows (WSL)
• Design_Description.md — how the board components are built, plus features and known limitations
• ghdl_implementation_plan.md — how the GHDL backend works
• Verilog_implementation_plan.md — how the Verilog backend (Icarus Verilog) works: research, design, tests and what was built
• winInstaller/README.md — the Windows desktop build

Built for PB1180 Programmerbare logiske kretser at USN — a browser simulator for the DE1-SoC board, backed by real GHDL and Icarus Verilog, so students can see LEDR <= SW; and similar constructs actually behave the way the real board would, without needing hardware in hand. The Verilog support was added just for others since the frontend of the simulator was already inplace.

HDLBoard stands on the work of others. Thank you to all of these projects and their contributors:

The license texts of the bundled simulators are installed with the Windows app and shown by its installer. DE1-SoC is a product of Terasic Technologies; HDLBoard is an independent teaching tool and is not affiliated with or endorsed by Terasic.

Licensed under the GNU General Public License v2.0.