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Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice

Slice 5.81% Shell 0.05% Verilog 1.53% Makefile 0.01% Forth 0.85% C 91.75%
fpga de10nano fomu ulx3s forth j1-cpu risc-v rv32 rv32i rv32im

silice-playground's Introduction

Silice-Playground

My Silice (https://github.com/sylefeb/Silice) Coding Experimental Area

Examples to play with FOMU, DE10NANO with MiSTer SDRAM, USB HUB and I/O BOARD and ULX3S via Silice.

FOMU

  • FOMU Directory

    • BLINKY
      • Simple LED colour cycle
    • USB_ACM
      • Simple UART input/output test
        • Connect to the UART, type R, G, B or X to change the LED
  • j1eforth/FOMU Directory

    • j1eforth
      • The J1 CPU with UART for communication
      • Interactive j1eforth environment

DE10NANO

  • Presently retird, being used for MiSTer!

ULX3S

  • PAWS

    • Risc-V RV32IMAFC CPU with retro console SoC
      • FAT16 SDCARD Support
        • Copy example programs to the ROOT DIRECTORY of the FAT16 partition on the SDCARD
      • GCC support for compiling own programs
        • Requires Risc-V GCC
        • Requires Risc-V NEWLIB
        • Compilation scripts have hardcoded paths for Arch Linux, adjust for your system
  • PAWS4th

    • J1 CPU with interactive j1eforth environment and same retro console SoC
      • Programs loaded via UART
  • VERILATOR

    • Various test programs
      • Includes the Risc-V floating-point unit tests

Silice

silice-playground's People

Contributors

rob-ng15 avatar sylefeb avatar xobs avatar

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silice-playground's Issues

J1eforth environment d< causes crash

d< word crashes the system when compiled into the j1eforth ROM.

Defining the word via the terminal or keyboard using the exact same definition works.

ulx3s script

You have a compile script to create J1eforth for the FOMU but I cannot find one for the ULX3S device, or have I missed it?

build j1eforth on ulx3s

Build almost complete to this point:
2.32.1. Executing OPT_EXPR pass (perform const folding).
Optimizing module top.
/usr/local/frameworks/boards/ulx3s/ulx3s.sh: line 35: 48322 Killed yosys -p 'scratchpad -copy abc9.script.flow3 abc9.script; synth_ecp5 -abc9 -json build.json' build.v
ERROR: Failed to open JSON file 'build.json'.
0 warnings, 1 error
sed: can't read build.config: No such file or directory

command was: sudo make ulx3s
I can build and install "blinky" in Silice

cannot build

when trying to build I get an error:
-- Parsing build.v' using frontend verilog' --
ERROR: Can't open input file `build.v' for reading: No such file or directory
ERROR: Failed to open JSON file 'build.json'.
0 warnings, 1 error
but this is because it cannot find silice. Where, what directory, should the project be located given that silice is in $HOME/silice/bin ... the default location? can I install the silice exectutable into something like /usr/local/bin ?

Build does not meet timing

The design runs in a single clock domain, driven by clki. This pin is a 48 MHz signal, and as a result the entire design actually runs at 48 MHz.

As a result, the system is overclocked and can fail on some devices:

Info: Max frequency for clock 'clk_48mhz': 32.13 MHz (PASS at 12.00 MHz)

j1eforth environment - extra ALU operations

The J1+ CPU has ALU operations for:

  • 2/equivalent to >>1 [ assembly notation a: t>>1 0510 ; ]
  • - (arithmetic subtraction) [ assembly notation a: n-t 0e10 ; ]

In the section ( new J1+ ALU operations ) of https://github.com/rob-ng15/Silice-Playground/blob/master/DE10NANO%2BULX3S/j1eforth/j1eforth-plus/j1.4th there are two commented lines ( : 2/ ]asm t>>1 alu asm[ ; ) ( uncommenting causes error ) and ( : - ]asm n-t d-1 alu asm[ ; ) ( uncommenting causes error ).

The line t: 2/ 1 literal rshift t;``should be replaced with t: 2/ 2/ t;andt: - ( n1 n2 -- n1-n2 ) negate + t;should be replaced witht: - t;`

However removing the commenting from the above lines and changing the Forth word definitions to what should be their correct definitions locks the j1eforth environment.

J1eforth on ULX3S, not OK prompt

Rob,
I have been busy with other things,
Updated software here and attempted a build. It completed and loaded onto device. No OK prompt.
Could it be a Silice or yosys problem or something else?
I did log the build process. Attached. big
Adrian
log.txt

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