PPA Comparison about freedom

[terpstra]

The Dhrystone DMIPS/MHz seem right. I can't comment on the rest.

[IC-Dream]

@riscveval Hi, when you make verilog for E51, have you met the following error:
[error] /root/freedom/sifive-blocks/src/main/scala/devices/mockaon/MockAONPeriphery.scala:7:8: object HasPeripheryCLINT is not a member of package freechips.rocketchip.devices.tilelink
[error] import freechips.rocketchip.devices.tilelink.HasPeripheryCLINT
[error] ^
[error] /root/freedom/sifive-blocks/src/main/scala/devices/mockaon/MockAONPeriphery.scala:16:35: not found: type HasPeripheryCLINT
[error] trait HasPeripheryMockAON extends HasPeripheryCLINT with HasPeripheryDebug { this: BaseSubsystem =>
[error] ^

Could you find type HasPeripheryCLINT in the path of your local:rocket-chip/src/main/scala/devices/tilelink/CLINT.scala??? i only can find the "CanHavePeripheryCLINT" in the CLINT.scala in my local. but it contains the HasPeripheryCLINT in github repo. it's strange.

Thanks for your help

[chlizheng]

@riscveval
Hi,
How do you evaluate the dhrystone of various RISCV cores? Do youo have the general bench? Now I also want to evaluate some riscv cores. Could you give me your bench of evaluation of dhrystone?
best wishes

[brucehoult]

@chlizheng freedom-e-sdk contains the dhrystone benchmark program. Just be sure you use the link script that includes the constant data in SRAM, otherwise it runs slowly.

make software PROGRAM=dhrystone LINK_TARGET=dhrystone
make upload PROGRAM=dhrystone

[chlizheng]

@brucehoult
Hi,Thanks.
Is freedom-e-sdk a general program of evaluation dhrystone for various riscv cores? I don't have it.
And now I only get the evaluation version of sifiveE21. I don't find the free-e-sdk? Could the program evaluate dhrystone of other riscv cores such as vscale,Piccolo and so on.

[brucehoult]

@chlizheng freedom-e-sdk contains RISC-V gcc compiler and other things for building programs for SiFive embedded RISC-V cores. It comes with configuration files (e.g. "make" include file setting the ISA and ABI, linker script) for various SiFive-supported SoC and FPGA boards. It should be possible to add configuration files for almost any other RISC-V embedded core.

You can find it at https://github.com/sifive/freedom-e-sdk

[chlizheng]

@brucehoult
Thanks,I'll try it.

[chlizheng]

Hi, now, I want to evaaluate the performance of myself riscv processor. And I use "riscv32-unknown-elf-gcc -march=rv32em -mabi=ilp32e benchmark.c" and "riscv32-unknown-elf-objdump -dr --disassembler-options=numeric,no-aliases a.out >benchmark.S" to get the instruction file and then plan to run it in myself processor. But when I check a.out and benchmark.S I find that the start address of a.out is 0x0000 but it's 0x10074 in benchmark.S. Besides, the hex value of instrustions in the two files can't match. For example, I can't find the value of a.out in the benchmark.S. Is my method wrong or the command having problems?
best wishes!

[chlizheng]

Maybe I should get the right instruction file. For example, in the benchmark.s one line is "100cc: 00e78c63 beq x15,x14,100e4 <deregister_tm_clones+0x28>. I use it to run in myself processor but it failed. Maybe I need the offset address rather than 100e4. How can I do it ?

[jim-wilson]

Objdump is a pretty simple tool. It is unlikely that the output is wrong.

Why do you think that the start address for the a.out is 0x0? "objdump -f a.out" will give you the program start address. "objdump -p a.out" will show you the ELF segment info. You should see something like
LOAD off 0x00000000 vaddr 0x00010000 paddr 0x00010000 align 2**12
filesz 0x00001e54 memsz 0x00001e54 flags r-x
which says that file offset 0 gets loaded at memory offset 0x10000. The first part of the ELF file is elf headers, and if the elf headers are 0x74, then the first instruction is at 0x10074. Programs are typically not loaded at address 0, because that breaks handling for null pointers.

You have the instruction encoding, 00e78c63. You shouldn't need the raw offset. But if you really do, then you can manually decode the instruction, or you can compute it by subtracting the instruction address from the target address. The objdump output is meant to be human readable, and printing the target address not the offset is most useful to humans.

[IC-Dream]

@jim-wilson please help to check this issue, it seems that the output of objdump is wrong.
riscv-software-src/riscv-tests#162

[chlizheng]

@jim-wilson
Thanks, I have misunderstanded before.

[jim-wilson]

The 0x10000 comes from the default linker script. You can see the default linker script by running the linker with --verbose, e.g. "riscv32-unknown-elf-ld --verbose".