GithubHelp home page GithubHelp logo

sigasi / sigasiprojectcreator Goto Github PK

View Code? Open in Web Editor NEW
16.0 16.0 10.0 186 KB

Python scripts that help generating custom Sigasi Project and Libary configuration files

License: BSD 3-Clause "New" or "Revised" License

Python 91.74% VHDL 2.77% Shell 0.07% Tcl 1.27% ANTLR 0.67% Forth 3.39% Fortran 0.10%

sigasiprojectcreator's People

Contributors

bartbrosens avatar felix-sigasi avatar heeckhau avatar joshrsmith avatar mderveeuw-si avatar sjaeckel avatar tivervac avatar wmeeus avatar

Stargazers

 avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar

Watchers

 avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar  avatar

sigasiprojectcreator's Issues

Fix filelist importer

The filelist input (ProjectFileParser.py) uses options.worklib, that should be options.work_lib.

Clean up project structure

While implementing .f support, it turned out that placing Python scripts inside Python modules is not recommended. We should investigate, and probably:

  • move the convert... scripts one level up in the directory tree
  • fix unit tests accordingly
  • make sure that it is not necessary to set PYTHONPATH

Or if that is not the preferred solution, at least put all convert... scripts in the same directory and ensure that the lower two bullets are met.

Call createSigasiProject.py without input_file argument

Hi,

I'm currently trying to set up a custom project (template) with the SigasiProjectCreator. However, it is required to hand over the input_file argument even though I want to create a new project from scratch.
Is it even possible to call createSigasiProject.py without an input file?
Thanks in advance for your answers/help.

Best regards

Marcel

How to map unisim VCOMPONENTS from .csv file?

Hello,
I am missing some documentation. I am using convertCsvFileToLinks.py and it will create a nice Sigasi project, however I always have to manually right-click the UNISIM library in the Sigasi source window and tell it to configure UNISIM from Vivado. Is there a way to do this from the .csv file or with an argument to convertCsvFileToLinks.py?

VUnit Support

Please can you add VUnit Support to the SigasiProjectCreator

Outdated README

The README and also the linked examples for generating a Sigasi project from a Vivado project seems to be outdated. Mentioned files like "convertCsvFileToTree.py" don't exist in the repository anymore.

Extend csv import for include folders and defines

The csv import is currently limited to design files only. We want to extend that:

  • If the first column of the csv file contains include, interpret the 2nd column of the same line(s) as (an) include path(s)
  • If the first column of the csv file contains define, interpret the 2nd column of the same line(s) as (a) define(s)

place only a single unisim VCOMPONENTS file in the unisim library

The library mapping for unisim generated by SigasiProjectCreator.py is

self.add_mapping("Common Libraries/unisim", "unisim")
self.unmap("Common Libraries/unisim/primitive")
self.unmap("Common Libraries/unisim/secureip")

This adds multiple versions of the VCOMP package to the unisim library which leads to duplicates so that the components can't be found in the design files.

The library mapping should add just the unisim_VPKG.vhd file and exactly one of the *_VCOMP.vhd files to the unisim library.

reference: http://insights.sigasi.com/tech/vivado-unisim.html

Support mapping files to multiple libraries in .f import

We want to add support to map files to more than one library when importing a project from a .f file. For each additional library, we should add a linked file to the original file, and map the linked file to the additional library.

Tests fail due to hardcoded path

Minor bug, but I thought I would report it anyway:

The python tests fail during test_parse_and_create_project() in tests/ProjectCreatorTest.py, probably due to a hardcoded path in line 444:
/home/wmeeus/git/SigasiProjectCreator_github/uvm/src

Support .f files

EDA tools may take a list of command line options from a file. Typically, -f <options_file> is used to specify the file, and the options file has a .f extension. In their simplest form, .f files contain a list of design files, but other command line options may be present as well.

The goal is to use .f files to create a Sigasi project.

Can I also edit existing Sigasi project files?

Hello Hendrik,

I'm planning to integrate a new feature into PoC. I want to manipulate vendor tool project files. Ideally, the user can select an IP core from PoC and our Python program will add all required files to the vendor tools project file. Sigasi could be a first starting point, because it provides an existing Python interface. For other tools we have to implement and control interactive Tcl sessions :(.

Can your library also edit existing project files?


Another maybe related question:
Does Sigasi support package managers or other third party IP core catalogs?

Kind regards
Patrick Lehmann

Create a project with a "simulator" layout

Import a project from a .f file, using a virtual folder per library, and linking each file into the appropriate library. Library mapping based on the virtual folders, not files.

UVM configuration

We want an option to configure UVM as part of a project. The path to UVM can be given either on the command line or through UVM_HOME. A second option indicates in which library uvm_pkg must be compiled.

To this end:

  • Command line options must be added:
    • --uvm[=<path>] : the presence of --uvm tells the project creator to set up UVM, the path to UVM can be added. If the path is not added on the command line, it will be read from UVM_HOME
    • --uvm_lib=<library>: map the UVM package to this library. If this option is not present, library work is assumed.
  • The UVM folder must be linked in Common Libraries
  • The UVM folder must be unmapped if it's part of the project tree (optional)
  • The appropriate folder must be added as an include folder
  • uvm_pkg.sv must be mapped to the desired library

extract SystemVerilog files from Vivado

When converting a Vivado project to a csv file, only VHDL and Verilog (.v) files are listed but no SystemVerilog (.sv) files. SV files also should be listed.

Recommend Projects

  • React photo React

    A declarative, efficient, and flexible JavaScript library for building user interfaces.

  • Vue.js photo Vue.js

    ๐Ÿ–– Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.

  • Typescript photo Typescript

    TypeScript is a superset of JavaScript that compiles to clean JavaScript output.

  • TensorFlow photo TensorFlow

    An Open Source Machine Learning Framework for Everyone

  • Django photo Django

    The Web framework for perfectionists with deadlines.

  • D3 photo D3

    Bring data to life with SVG, Canvas and HTML. ๐Ÿ“Š๐Ÿ“ˆ๐ŸŽ‰

Recommend Topics

  • javascript

    JavaScript (JS) is a lightweight interpreted programming language with first-class functions.

  • web

    Some thing interesting about web. New door for the world.

  • server

    A server is a program made to process requests and deliver data to clients.

  • Machine learning

    Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.

  • Game

    Some thing interesting about game, make everyone happy.

Recommend Org

  • Facebook photo Facebook

    We are working to build community through open source technology. NB: members must have two-factor auth.

  • Microsoft photo Microsoft

    Open source projects and samples from Microsoft.

  • Google photo Google

    Google โค๏ธ Open Source for everyone.

  • D3 photo D3

    Data-Driven Documents codes.