simonace / nand2tetris_vhdl

Nand2Tetris in VHDL

This project of myself is the VHDL realization of the very simple CPU in course Nand2Tetris. Many thanks to the professors and other contributors to this course.

It is rather easy for me to finish the course's hardware part since I was majored in Microelectronics in university. Despite this, it is a quite helpful course I will recommand to everyone!

The VHDL codes are all tested in EDA tools by simulation, but not on FPGA. I have coded them carefully in a synthesizable way so it should be working fine on FPGA. Might come back to this in the future, now just let me say it's done.