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taylor-bsg's Projects

tritonsizer icon tritonsizer

UCSD Sizer for leakage/dynamic power recovery, timing recovery

verible icon verible

Verible provides a SystemVerilog parser, style-linter, and formatter.

vivado-risc-v icon vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

vsdsram_sky130 icon vsdsram_sky130

Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns

wav-build icon wav-build

Repository with infrastructure required to build Wavious Software

xchange icon xchange

Change part number or package in a Xilinx 7-series FPGA bitstream

xiangshan icon xiangshan

Open-source high-performance RISC-V processor

xls icon xls

XLS: Accelerated HW Synthesis

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