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This project forked from ironsteel/apple-one

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An attempt at a small Verilog implementation of the original Apple 1 on an iCE40 FPGA

License: Apache License 2.0

Makefile 1.86% Verilog 68.67% Batchfile 0.06% Shell 0.04% SourcePawn 26.06% Assembly 2.58% C 0.74%

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