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Try to embed it on Zynq board.

License: Apache License 2.0

Shell 0.15% Python 0.48% Makefile 2.42% C++ 95.32% PHP 1.37% Lua 0.23% Batchfile 0.03%
guetzli zybo zynq-7000

guetzli's Introduction

Hi there

  • This account is primarily for Intel internal projects, so there will not be many public commits. There are also some repositories from my university days that are no longer maintained. They should be free to use, but please check the license for the collaboration repositories;
  • If you have any questions, you can reach out to my personal email ([email protected]), but please expect infrequent or no responses since these projects are from several years ago, thanks for your understanding;
  • In general, I'm a hardware-focused engineer currently working on Intel server platform customized solutions. My work mainly involves FPGA/CPLD solutions, power sequence details, server platform design methodologies and implementation, and system debugging on both hardware and firmware. So I frequently use Verilog, and also write some C/C++/Python scripts, mostly out of interests.

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