Comments (6)
I believe something similar happened before with table.init, when we moved to multiple tables.
We could require the (memory 0)
syntax to spell out the memory, following the syntax we use in other places. But for consistency, we'd then have to do that on all load/store instructions, which would be rather tedious.
I think we could still change the syntax for lanes (say, to lane=0
), but keep allowing the current syntax as backwards compat form that you can only use without a memory index. But I suppose that doesn't actually fix your problem, because that would come after...
from multi-memory.
I actually wouldn't mind having (memory X)
everywhere, but I do agree it could get tedious. I also wouldn't mind keeping the backtracking for these instructions; it's not like they should come up a lot and the backtracking is fairly minor and well contained.
from multi-memory.
I just noticed that we already define memuse ::= '(' memory x:memidx ')
in the text format, so it already exists if we want to use it for memory references in instructions as well.
from multi-memory.
@tlively, yes, that's why I brought it up. But the tediousness argument still stands.
from multi-memory.
I just noticed that memory.init
has a similar problem where e.g. figuring out whether the 5
in memory.init 5
is supposed to be a memory or data index requires backtracking.
Edit: ah, you already mentioned table.init
, so I suppose this is already known. The difference is that memory.init
is implemented in binaryen but table.init
is not.
from multi-memory.
What about memory=N
, to be more consistent with the offset=N
syntax for load/store?
from multi-memory.
Related Issues (20)
- Data segment syntax incompatible with bulk-memory-operations proposal HOT 1
- Text format for data segments may be confusing with passive data segments HOT 2
- Read only memories? HOT 11
- Binary format is out of date HOT 3
- How is a non-default memory index to be denoted in the text format? HOT 3
- Text syntax for SIMD lane index vs memory index operands HOT 1
- Possibility to dynamically add memories at runtime? HOT 2
- Overlap with recent issue raised on the main WASM design repo HOT 5
- Contradiction in multi-memory binary format instruction rules HOT 3
- A question about high level language interaction HOT 7
- Referencing locations across memories HOT 10
- Multi-Memory Lowering & Memory Imports HOT 1
- Use-case for multi-memory: Flutter Web Engine linking with wasm-compiled skia (C++) and ICU4X (Rust) HOT 5
- Use-case for multi-memory: dart2wasm to implement ByteBuffer/TypedList objects with linear memory HOT 8
- Use-case for multi-memory: Component Model object transfer browser polyfill HOT 2
- Additional test cases for multi-memory HOT 3
- Use-case for multi-memory: Less overhead tracking of store calls to facilitate networked rollback HOT 1
- Use case for multi-memory: Sharing persistent datastructures between threads
- Toolchain support for multiple memories HOT 22
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from multi-memory.