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清華大學 | 積體電路設計實驗 (IC LAB) | 110上

Shell 0.01% Python 0.12% Fortran 0.01% Tcl 0.49% Verilog 99.26% MATLAB 0.01% Max 0.01% Forth 0.05% Stata 0.04% Makefile 0.01% Filebench WML 0.02%

nthu-iclab's Introduction

NTHU EE4292 IC Design Laboratory (ICLab)

Labs

# Content
lab01 Workstation
lab02 NC-Verlilog
lab03 Testbench Debugging and Writing
lab04 Verdi & Finite State Machine
lab05 RTL Simulation and Debugging
lab06 Coding for synthesis and optimization
lab07 Line-based Image Processing
lab08 Coding for Synthesis
lab09 Conformal check with LEC & ECO-Integer Division
lab10 APR Flow with IC Compiler (Design Setup and Floorplan)
lab11 APR Flow with IC Compiler (Powerplan and Placement)
lab12 APR Flow with IC Compiler (CTS, Routing, Verification and Power Analysis)

Homework

# Content
HW1 Three-input Raster Operations (ROP3) for Computer Graphics
HW2 Enigma
HW3 Logic Synthesis for Enigma
HW3.1 Logic Synthesis for ROP3
HW4 QR Code Decoder with Error Correction
HW5 Digit classification using CNN

Final Project

Implement Edge Detection on Images using HOG Algorithm with Some Noise Filters

nthu-iclab's People

Contributors

lyhsieh avatar

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