commaai / agnos-kernel-sdm845 Goto Github PK
View Code? Open in Web Editor NEWKernel for the SDM845 modules
License: Other
Kernel for the SDM845 modules
License: Other
ADB should work on dev USB C port and should be able to be seen by computer with 'lsusb'
The kernel hard-lockups when inserting the NVMe kernel driver.
In /sys/kernel/debug/ipc_logging/pcie1-short/log
, it always hangs on:
[ 388.548337747/ 0x1c720840e] arch_setup_msi_irq_qgic: RC1
[ 388.548345195/ 0x1c720849d] msm_pcie_create_irq_qgic: RC1
[ 388.548353580/ 0x1c720853e] msm_pcie_create_irq_qgic: pos:0 msi_irq_in_use:0
[ 388.548361549/ 0x1c72085d7] msm_pcie_create_irq_qgic: test_and_set_bit is successful pos=0
[ 388.548369205/ 0x1c720866a] arch_setup_msi_irq_qgic: irq 531 is allocated
[ 388.548395299/ 0x1c720885f] msm_pcie_map_qgic_addr: PCIe: RC1: client does not have an iommu domain
[ 388.548402955/ 0x1c72088f2] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00e2[2] -> 0x00000186; rd 0x0186f805
[ 388.548409830/ 0x1c7208976] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00e2[2] <- 0x0186f805; rd 0x0186f805 val 0x000[ 388.548416966/ 0x1c72089ff] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00e4[4] <- 0x17a00040; rd 0x00000000 val 0x17a
[ 388.548423945/ 0x1c7208a85] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00e8[4] <- 0x00000000; rd 0x00000000 val 0x000[ 388.548430820/ 0x1c7208b09] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00ec[2] <- 0x000002e0; rd 0x00000000 val 0x000
[ 388.548438008/ 0x1c7208b93] arch_setup_msi_irqs: ret from msi_irq: 0
[ 388.548471445/ 0x1c7208e16] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0004[2] -> 0x00000006; rd 0x00100006
[ 388.548479049/ 0x1c7208ea7] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0004[2] <- 0x00100406; rd 0x00100006 val 0x000[ 388.548485195/ 0x1c7208f1d] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00e2[2] -> 0x00000186; rd 0x0186f805
[ 388.548491966/ 0x1c7208f9f] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00e2[2] <- 0x0187f805; rd 0x0186f805 val 0x000
[ 388.548502226/ 0x1c7209064] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0000[4] -> 0x50121987; rd 0x50121987
[ 388.548508216/ 0x1c72090d7] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0004[4] -> 0x00100406; rd 0x00100406
[ 388.548513841/ 0x1c7209143] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0008[4] -> 0x01080201; rd 0x01080201
[ 388.548519726/ 0x1c72091b4] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x000c[4] -> 0x00000000; rd 0x00000000
[ 388.548525403/ 0x1c7209221] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0010[4] -> 0x40300004; rd 0x40300004
[ 388.548531289/ 0x1c7209292] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0014[4] -> 0x00000000; rd 0x00000000
[ 388.548537018/ 0x1c7209300] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0018[4] -> 0x00000000; rd 0x00000000
[ 388.548542955/ 0x1c7209372] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x001c[4] -> 0x00000000; rd 0x00000000
[ 388.548548685/ 0x1c72093e0] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0020[4] -> 0x00000000; rd 0x00000000
[ 388.548554518/ 0x1c7209450] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0024[4] -> 0x00000000; rd 0x00000000
[ 388.548560143/ 0x1c72094bc] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0028[4] -> 0x00000000; rd 0x00000000
[ 388.548565924/ 0x1c720952b] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x002c[4] -> 0x50121987; rd 0x50121987
[ 388.548571758/ 0x1c720959b] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0030[4] -> 0x00000000; rd 0x00000000
[ 388.548577903/ 0x1c7209611] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0034[4] -> 0x00000080; rd 0x00000080
[ 388.548583841/ 0x1c7209683] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0038[4] -> 0x00000000; rd 0x00000000
[ 388.548589466/ 0x1c72096ef] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x003c[4] -> 0x00000100; rd 0x00000100
[ 388.548596237/ 0x1c7209771] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0088[2] -> 0x0000291f; rd 0x0000291f
[ 388.548602122/ 0x1c72097e2] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0090[2] -> 0x00000002; rd 0x10130002
[ 388.548608372/ 0x1c720985a] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00a8[2] -> 0x00000400; rd 0x00000400
[ 388.548614153/ 0x1c72098c9] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00b0[2] -> 0x00000003; rd 0x001e0003
[ 388.548620560/ 0x1c7209944] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0006[2] -> 0x00000010; rd 0x00100406
[ 388.548626653/ 0x1c72099b9] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0034[1] -> 0x00000080; rd 0x00000080
[ 388.548632695/ 0x1c7209a2d] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0080[2] -> 0x0000d010; rd 0x0002d010
[ 388.548638476/ 0x1c7209a9c] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00d0[2] -> 0x0000e011; rd 0x0008e011
[ 388.548644153/ 0x1c7209b09] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00e0[2] -> 0x0000f805; rd 0x0187f805
[ 388.548649883/ 0x1c7209b77] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x00f8[2] -> 0x00000001; rd 0x00030001
[ 388.548656497/ 0x1c7209bf6] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0100[4] -> 0x11010018; rd 0x11010018
[ 388.548662487/ 0x1c7209c69] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0110[4] -> 0x1281001e; rd 0x1281001e
[ 388.548668268/ 0x1c7209cd8] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0128[4] -> 0x2001000e; rd 0x2001000e
[ 388.548674101/ 0x1c7209d48] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0200[4] -> 0x30020001; rd 0x30020001
[ 388.548679987/ 0x1c7209db9] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0300[4] -> 0x00010019; rd 0x00010019
[ 388.548686445/ 0x1c7209e35] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0100[4] -> 0x11010018; rd 0x11010018
[ 388.548692383/ 0x1c7209ea7] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0110[4] -> 0x1281001e; rd 0x1281001e
[ 388.548698320/ 0x1c7209f19] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0128[4] -> 0x2001000e; rd 0x2001000e
[ 388.548704205/ 0x1c7209f8a] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0200[4] -> 0x30020001; rd 0x30020001
[ 388.548710091/ 0x1c7209ffb] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0300[4] -> 0x00010019; rd 0x00010019
[ 388.548716289/ 0x1c720a072] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0100[4] -> 0x11010018; rd 0x11010018
[ 388.548722174/ 0x1c720a0e3] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0110[4] -> 0x1281001e; rd 0x1281001e
[ 388.548728268/ 0x1c720a158] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0128[4] -> 0x2001000e; rd 0x2001000e
[ 388.548734414/ 0x1c720a1ce] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0200[4] -> 0x30020001; rd 0x30020001
[ 388.548740247/ 0x1c720a23e] DBG3:msm_pcie_oper_conf: RC1 1:0x00 + 0x0300[4] -> 0x00010019; rd 0x00010019
On a PCI failure the icnss_driver tries to recover, but then fails. This goes into a while loop taking down the device: https://github.com/commaai/agnos-kernel-sdm845/blob/master/drivers/soc/qcom/icnss.c#L2472
Upstream changes:
https://github.com/LineageOS/android_kernel_xiaomi_sdm845/commits/lineage-19.1/drivers/soc/qcom/icnss.c
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