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A crude reverse engineering of the Pi5 PCIe connector & potential breakout boards.

Home Page: https://www.george-smart.co.uk/

License: MIT License

kicad nvme pcb pcie raspberry-pi raspberry-pi-5 reverse-engineering

pi5_pcie's Issues

I2C

I suspect P3+P4 are I2C and used to communicate with the RP2040 seen on the prototype M.2 HAT. The BCM2712 has two pins muxed to the I2C peripheral and they're named PCIE_SCL/SDA. It isn't the RP1 either as that has a separate I2C bus.

These two pins are configured with the weak internal pulldown enabled and always read as low. The M.2 HAT presumably has the missing I2C pullup resistors.

114: a1    pd | lo // PCIE_SDA/GPIO14 = SPI_S_MOSI_OR_BSC_S_SDA
115: a1    pd | lo // PCIE_SCL/GPIO15 = SPI_S_SCK_OR_BSC_S_SCL

Should be easy enough to confirm by running pinctrl before & after pulling the pins high.

PCIe Lane inter-pair reversal

The prototype M.2 HAT doesn't appear to have crossed PCIE_RX0P/N pairs, so I suspect I have them around the wrong way. It works on hardware both ways, so at least one end autodetects. Thus, can't rely on the "working" to be the indicator, and now using the PCB traces to inform.

Quick drawing showing the RX pair lanes are swapped on the Pi5 connector, confirming there is no twist on the M.2 hat
[AltText: Quick drawing showing the RX pair lanes are swapped on the Pi5 connector, confirming there is no twist on the M.2 hat]

Testing with i225

Hi there,

Is there any chance you can try an intel i225 with your extension can see if it works.
I am specifically interested since you are reversing the polarity of the reset signal.

Thank you

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