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Open Source Software for Developing on the Freedom E Platform

License: Other

Makefile 5.94% C 62.12% Shell 1.12% Dockerfile 0.10% Python 0.38% HTML 26.53% JavaScript 1.74% CSS 1.16% Assembly 0.92%

freedom-e-sdk's Introduction

SiFive Freedom E SDK README

This repository, maintained by SiFive Inc, makes it easy to get started developing software for the Freedom E and Freedom S Embedded RISC-V Platforms. This SDK is intended to work on any target supported by SiFive's distributions of the RISC-V GNU Toolchain.

Documentation for Freedom E SDK is available here

Freedom E SDK was recently transitioned to using the Freedom Metal compatibility library. If you're looking for the old Freedom E SDK, software examples, and board support files, you can find those on the v1_0 branch.

What is Freedom Metal?

Freedom Metal (Documentation) is a library developed by SiFive for writing portable software for all of SiFive's RISC-V IP, RISC-V FPGA evaluation images, and development boards. Programs written against the Freedom Metal API are intended to build and run for all SiFive RISC-V targets. This makes Freedom Metal suitable for writing portable tests, bare metal application programming, and as a hardware abstraction layer for porting operating systems to RISC-V.

Contents

Freedom Metal Compatibility Library

  • Board Support Packages (found under bsp/)
    • Supported Targets:
    • The board support files for the Freedom Metal library are located entirely within a single target directory in bsp/<target>/. For example, the HiFive 1 board support files for Freedom Metal are entirely within bsp/sifive-hifive1/ and consist of the following:
      • design.dts, core.dts
        • The DeviceTree description of the target. This file is used to parameterize the Freedom Metal library to the target device. Modifications to these files are propagated to the generated files by freedom-devicetree-tools.
      • metal.h, metal-inline.h
        • The Freedom Metal machine headers are generated files which are used internally to Freedom Metal to instantiate structures to support the target device.
      • metal-platform.h
        • The Freedom Metal platform header provides a list of C proprocessor definitions which are used by Freedom Metal to indicate the presence of devices and provide the memory-mapped register interface for each device. The contents of this header is considered public API surface of the Metal library and can be used in applications by including metal/machine/platform.h.
      • metal.%.lds
        • Generated linker scripts for the target. The different scripts allow for different memory configurations.
      • openocd.cfg (for development board and FPGA targets)
        • Used to configure OpenOCD for flashing and debugging the target device.
      • settings.mk
        • Includes a variety of parameters which affect the build system for the target, including the RISC-V ISA string, the selected ABI, the code model, and more.
  • FreeRTOS (found under FreeRTOS-metal/):
    • A class of RTOS that is designed to be small enough to run on a microcontroller
    • Provided here under its own license
  • A Few Example Programs (found under software/)
    • empty
      • An empty project. Serves as a good starting point for your own program.
    • hello
      • Prints "Hello, World!" to stdout, if a serial device is present on the target.
    • sifive-welcome
      • Prints a welcome message and interacts with the LEDs.
    • return-pass
      • Returns status code 0 indicating program success.
    • return-fail
      • Returns status code 1 indicating program failure.
    • example-itim
      • Demonstrates how to statically link application code into the Instruction Tightly Integrated Memory (ITIM) if an ITIM is present on the target.
    • software-interrupt
      • Demonstrates how to register a handler for and trigger a software interrupt
    • timer-interrupt
      • Demonstrates how to register a handler for and trigger a timer interrupt
    • local-interrupt
      • Demonstrates how to register a handler for and trigger a local interrupt
    • example-pmp
      • Demonstrates how to configure a Physical Memory Protection (PMP) region
    • example-spi
      • Demonstrates how to use the SPI API to transfer bytes to a peripheral
    • dhrystone
      • "Dhrystone" Benchmark Program by Reinhold P. Weicker
    • coremark
      • "CoreMark" Benchmark Program that measures the performance of embedded microcrontrollers (MCU)
    • cflush
      • A simple example demo how to use cflush (Data) L1 and use FENCE to ensure flush complete.
    • example-rtc
      • Demonstrates how to use the RTC API to start a Real-Time Clock, set a compare value, and handle an interrupt when the clock matches the compare value.
    • example-watchdog
      • Demonstrates how to use the Watchdog API to set a watchdog timer to trigger an interrupt on timeout.
    • example-user-mode
      • Demonstrates how to drop to user mode privilege level.
    • example-user-syscall
      • Demonstrates how to register a handler for the "syscall from user mode" exception, drop to the user mode privilege level, and then issue a syscall.
    • plic-interrupts
      • A simple example demonstrating how PLIC interrupts get uses on an Arty board.
    • test-coreip
      • Assembly test code which executes instructions and checks for expected results. The tests are designed to work on SiFive CPU designs in RTL simulation or on the Arty FPGA board.
    • clic-vector-interrupts
      • A simple example demonstrating how to use CLIC non vector interrupts
    • clic-selective-vector-interrupts
      • A simple example demonstrating how to use CLIC selective vector interrupts
    • clic-hardware-vector-interrupts
      • A simple example demonstrating the use of CLIC hardware vector interrupts
    • minimal-boot
      • Demonstrates how to replace the Metal constructors and replace them with your own
    • atomics
      • Demonstrates how to use the Metal Atomic API to leverage the RISC-V atomic instruction set.
    • example-i2c
      • Demonstrates usage of the I2C API to communicate with I2C slaves.
    • example-pwm
      • Demonstrates usage of the PWM API to generate waveforms.
    • mem-latency
      • A memory test that measure the latency at different cache layers and memory blocks
    • example-hpm
      • Demonstrates usage of the RISC-V hardware performance counter APIs.
    • example-l2pm
      • Demonstrates usage of Sifive L2 performance monitor counter APIs to capture L2 cache event logs.
    • example-l2pf
      • Example for usage and measuring effectiveness of SiFive L2 Prefetcher.
    • example-lim
      • Demonstrates how to designate a function to be linked into the LIM (Loosely-Integrated Memory).
    • example-freertos-minimal
      • A simple FreeRTOS skeleton to build your FreeRTOS application.
    • example-freertos-blinky
      • A simple FreeRTOS blinky application.

Setting up the SDK

Prerequisites

To use this SDK, you will need the following software available on your machine:

  • GNU Make
  • Git
  • RISC-V GNU Toolchain
  • RISC-V QEMU 4.1.0 (for use with the qemu-sifive-* simulation targets)
  • RISC-V OpenOCD (for use with development board and FPGA targets)
  • Segger J-LINK (for use with certain development boards)
  • Python >= 3.5
  • Python Virtualenv
  • Python Pip

Details on installing the RISC-V and Segger software follow.

Install the RISC-V Toolchain and OpenOCD

The RISC-V GNU Toolchain and OpenOCD are available from the SiFive Website at

https://www.sifive.com/software

For OpenOCD and/or RISC-V GNU Toolchain, download the .tar.gz for your platform, and unpack it to your desired location. Then, use the RISCV_PATH and RISCV_OPENOCD_PATH variables when using the tools:

cp openocd-<date>-<platform>.tar.gz /my/desired/location/
cp riscv64-unknown-elf-gcc-<date>-<platform>.tar.gz /my/desired/location
cd /my/desired/location
tar -xvf openocd-<date>-<platform>.tar.gz
tar -xvf riscv64-unknown-elf-gcc-<date>-<platform>.tar.gz
export RISCV_OPENOCD_PATH=/my/desired/location/openocd
export RISCV_PATH=/my/desired/location/riscv64-unknown-elf-gcc-<date>-<version>
Install RISC-V QEMU 4.1.0

The RISC-V QEMU Emulator is available from the SiFive Website at

https://www.sifive.com/software

Download the .tar.gz for your platform and unpack it to your desired location. Then, add QEMU to your path:

cp riscv-qemu-<version>-<date>-<platform>.tar.gz /my/desired/location
tar -xvf riscv-qemu-<version>-<date>-<platform>.tar.gz
export PATH=$PATH:/my/desired/location/riscv-qemu-<version>-<date>-<platform>/bin
Install Segger J-Link Software

Some targets supported by Freedom E SDK (like the SiFive HiFive1 Rev B) use Segger J-Link OB for programming and debugging. If you intend to use these targets, install the Segger J-Link Software and Documentation Pack for your machine:

Segger J-Link Software Downloads

Cloning the Repository

This repository can be cloned by running the following commands:

git clone --recursive https://github.com/sifive/freedom-e-sdk.git
cd freedom-e-sdk

The --recursive option is required to clone the git submodules included in the repository. If at first you omit the --recursive option, you can achieve the same effect by updating submodules using the command:

git submodule update --init --recursive

Updating your SDK

If you'd like to update your SDK to the latest version:

git pull origin master
git submodule update --init --recursive

Python

Freedom E SDK includes a number of Python scripts used during the build process to parameterize the build of Freedom Metal to the target. The dependencies of these scripts are tracked in requirements.txt. Freedom E SDK manages its own virtualenv, but there are some options which allow users to configure the virtualenv to best suit your needs.

Predownloading Python Dependencies

By default, Freedom E SDK will download Python packages from the Python Package Index when it creates the virtualenv. If you prefer to download dependencies ahead-of-time, you can run

make pip-cache

to download all Python packages. This mechanism downloads all of the dependencies pre-compiled for all platforms and Python versions supported by Freedom E SDK, so if you're trying to bring up Freedom E SDK on a system without an internet connection you can create the "pip cache" and then copy it to the connectionless machine with Freedom E SDK.

The location of the "pip cache" can be controlled with the environment variable FREEDOM_E_SDK_PIP_CACHE_PATH

export FREEDOM_E_SDK_PIP_CACHE_PATH=/path/to/pip-cache

Virtualenv Location

By default, the virtualenv is created in the venv folder at the root of Freedom E SDK. To change the location of the virtualenv, set the environment variable FREEDOM_E_SDK_VENV_PATH

export FREEDOM_E_SDK_VENV_PATH=/path/to/venv

Using the Tools

Building an Example

To compile a bare-metal RISC-V program:

make [PROGRAM=hello] [TARGET=freedom-e310-arty] [CONFIGURATION=debug] software

The square brackets in the above command indicate optional parameters for the Make invocation. As you can see, the default values of these parameters tell the build script to build the hello example for the freedom-e310-arty target with the debug configuration. If, for example, you wished to build the timer-interrupt example for the S51 Arty FPGA Evaluation target, with the release configuration, you would instead run the command

make PROGRAM=timer-interrupt TARGET=coreip-s51-arty CONFIGURATION=release software
Building an Benchmark Program

Building a benchmark program is slightly special in that certain section is required to be loaded in specific memory region. A specialize linker file has been created for its optimal run.

make PROGRAM=dhrystone TARGET=coreip-e31-arty LINK_TARGET=ramrodata software
Building an Example with FreeRTOS

A link target exist specificly for freertos, even if default target might work on some examples. Here is an exemple of use :

make PROGRAM=example-freertos-blinky-pmp TARGET=sifive-hifive1-revb LINK_TARGET=freertos software

Uploading to the Target Board

make [PROGRAM=hello] [TARGET=sifive-hifive1] [CONFIGURATION=debug] upload

Debugging a Target Program

make [PROGRAM=hello] [TARGET=sifive-hifive1] [CONFIGURATION=debug] debug

Cleaning a Target Program Build Directory

make [PROGRAM=hello] [TARGET=sifive-hifive1] [CONFIGURATION=debug] clean

Create a Standalone Project

You can export a program to a standalone project directory using the standalone target. The resulting project will be locked to a specific TARGET. Note that this functionality is only supported for Freedom Metal programs, not the Legacy Freedom E SDK.

STANDALONE_DEST is a required argument to provide the desired project location.

make [PROGRAM=hello] [TARGET=sifive-hifive1] [INCLUDE_METAL_SOURCES=1] STANDALONE_DEST=/path/to/desired/location standalone

Run make help for more commands.

For More Information

Documentation, Forums, and much more available at

www.sifive.com

freedom-e-sdk's People

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freedom-e-sdk's Issues

Freedom port to Nexys4 DDR board

Freedom only can run on Arty and VC707, but I want to run on Nexys4 DDR board. So I fix some fpga configuration file. After I fixing, I execute command "make -f Makefile.e300nexys4ddrdevkit mcs". There are some errors as follow:

Phase 1.2 IO Placement/ Clock Placement/ Build Placer Device INFO: [Timing 38-35] Done setting XDC timing constraints. CRITICAL WARNING: [Place 30-722] Terminal 'qspi_cs' has IOB constraint set to TRUE, but it is either not connected to a FLOP element or the connected FLOP element could not be brought into the I/O ERROR: [Place 30-574] Poor placement for routing between an IO pin and BUFG. If this sub optimal condition is acceptable for this design, you may use the CLOCK_DEDICATED_ROUTE constraint in the .xdc file to demote this message to a WARNING. However, the use of this override is highly discouraged. These examples can be used directly in the .xdc file to override this clock rule. < set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets IOBUF_6/O] > IOBUF_6/IBUF (IBUF.O) is locked to IOB_X1Y115 IOBUF_6_O_BUFG_inst (BUFG.I) is provisionally placed by clockplacer on BUFGCTRL_X0Y31 Resolution: Poor placement of an IO pin and a BUFG has resulted in the router using a non-dedicated path between the two. There are several things that could trigger this DRC, each of which can cause unpredictable clock insertion delays that result in poor timing. This DRC could be caused by any of the following: (a) a clock port was placed on a pin that is not a CCIO-pin (b)the BUFG has not been placed in the same half of the device or SLR as the CCIO-pin (c) a single ended clock has been placed on the N-Side of a differential pair CCIO-pin. Phase 1.2 IO Placement/ Clock Placement/ Build Placer Device | Checksum: ffcc549c Time (s): cpu = 00:00:12 ; elapsed = 00:00:11 . Memory (MB): peak = 2962.973 ; gain = 0.000 ; free physical = 1683 ; free virtual = 3488 Phase 1 Placer Initialization | Checksum: ffcc549c Time (s): cpu = 00:00:12 ; elapsed = 00:00:11 . Memory (MB): peak = 2962.973 ; gain = 0.000 ; free physical = 1683 ; free virtual = 3488 ERROR: [Place 30-99] Placer failed with error: 'IO Clock Placer failed' Please review all ERROR, CRITICAL WARNING, and WARNING messages during placement to understand the cause for failure. Ending Placer Task | Checksum: ffcc549c Time (s): cpu = 00:00:12 ; elapsed = 00:00:12 . Memory (MB): peak = 2962.973 ; gain = 0.000 ; free physical = 1682 ; free virtual = 3488 INFO: [Common 17-83] Releasing license: Implementation 13 Infos, 0 Warnings, 1 Critical Warnings and 3 Errors encountered. place_design failed ERROR: [Common 17-69] Command failed: Placer could not place all instances while executing "source [file join $scriptdir "place.tcl"]" (file "/home/RISCV/freedom/fpga-shells/xilinx/common/tcl/vivado.tcl" line 24) INFO: [Common 17-206] Exiting Vivado at Tue Apr 10 11:04:11 2018... common.mk:81: recipe for target '/home/cailinlin/RISCV/freedom/builds/e300nexys4ddrdevkit/obj/E300Nexys4DDRDevKitFPGAChip.bit' failed make: *** [/home/RISCV/freedom/builds/e300nexys4ddrdevkit/obj/E300Nexys4DDRDevKitFPGAChip.bit] Error 1

And I correct error according to tips, Add the
"set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets IOBUF_6/O]"
in nexys4_ddr-master.xdc. And I execute command "make -f Makefile.e300nexys4ddrdevkit mcs" again. According to tips, I also add the
"set_property SEVERITY {Warning} [get_drc_checks NSTD-1]
set_property SEVERITY {Warning} [get_drc_checks UCIO-1]"
in the same file. And there is no error, and generate the bit file.

All files which I fixed according to Arty files, If I fix error like above, whether there will exist potential problem. Because when I upload demo occurs some problems.

Tools build problem on aarch64

Currently, make tools doesn't complete on aarch64. The platform is not recognized by openocd.

It was very simple to fix this: replace configure.guess and configure.sub in openocd/jimtcl/autosetup with recent versions from GNU. E .g.

cd openocd/jimtcl/autosetup
wget -O config.guess 'http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD'
wget -O config.sub 'http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.sub;hb=HEAD'

This fix should probably be taken upstream, but I'm not quite sure where, and how to make the change propagate here, as it is three sub projects deep. Maybe here?

SPI interfacing validation

Hi, I am trying to implement SPI interface. I am referring the provided example /freedom-e-sdk/software/example-spi. I am trying to validate if my transfer is successfully completed or not. Does anyone facing any issues in transferring data? How should i validate? Is there any log file for that?

Need to install expat-dev to get proper OpenOCD-GDB Interaction

The libexpat1-dev package (provides expat-dev) seems to be necessary before running GDB's ./configure if you want to use OpenOCD to debug programs executing from Flash. OpenOCD sends the MemoryMap to GDB in XML so. GDB knows which memory regions, like Flash, require HW Breakpoints. Otherwise when you try to set a breakpoint in a HW region:

"warning: Can not parse XML target description; XML support was disabled at compile time"

We need to add this to the README at least.

http://stackoverflow.com/questions/5665800/compiling-gdb-for-remote-debugging

Packages needed by Fedora 25 should be added to README,md

Since Ubuntu may not be the only system used, I suggest that a Fedora 25 package list be maintained as well. The following should be included in that list:
autoconf automake texinfo mpfr mpfr-devel mpc libmpc-devel gmp libtool gawk bison flex libusb-devel

Make examples does nothing

make examples is a target shown in the make help menu but is not present in the actual Makefile at the root of the repo.

dhrystone does not work on HiFive1 RevB

Unlike in the old v1_0 code there is no longer a hack to replace scanf() with a version that returns a hard-coded value.

printf ("Please give the number of runs through the benchmark: ");
{
  int n;
  scanf ("%d", &n);
  Number_Of_Runs = DHRY_ITERS;
}

The scanf() just hangs. Or at least I can't find anything I can type as input that makes it continue. I tried a number followed by various of " ", return, ^J, ^M.

The return value isn't used anyway. Commenting out the scanf() makes it work, with a printed result of 333 dhrystones per second with the default 2000 iters, 335 if I increase it a lot e.g. 100000.

How to use UART ?

Hi, I'm writing some test codes on freedom-e300-arty. I'm a little confused about how to use UART with and without interrupt.

For example, what value should I write into the UART register txctrl.txcnt if I want to send 8-bit data via UART and get a "tx complemeted interrupt" signal from the UART? What value should I write into the UART register rxctrl.rxcnt if I want to receive 8-bit data via UART and get a "rx complemeted interrupt" signal from the UART? In this way the cpu can excute other codes and take care of the data from the UART register rxdata.data when the interrupt signal comes.

Another question is, if I want to receive data via UART without using the interrupt, what codes should I write?

Can you please write some demos about UART? Thanks!!

Need DEBUG or RELEASE command line option for make

Adding an option to the make commands to enable optimizations and disable debug symbols to help code size. Something like

make BSP=metal PROGRAM=hello TARGET=sifive-hifive1 RELEASE=on software

If RELEASE is not specified have it default to no optimizations to allow for better debugging capabilities. This can be tied in with the Eclipse profiles for 'Release' and 'Debug' target options

Demo_gpio on for freedom-e310-arty compile failure (uart.h)

I have compiled and programmed the mcs file for the freedome-e310 arty board and programmed the FPGA. I am getting errors on the compile using the the following command?

Shouldn't this compile out of the box if I haven't touched any of the files?

Salman

make software BSP=metal PROGRAM=demo_gpio TARGET=freedom-e310-arty

Entering directory /home/ssheikh/freedom-e-sdk/bsp/freedom-e310-arty/build' riscv64-unknown-elf-gcc -DPACKAGE_NAME=\"freedom-metal\" -DPACKAGE_TARNAME=\"freedom-metal\" -DPACKAGE_VERSION=\"v0.1.2\" -DPACKAGE_STRING=\"freedom-metal\ v0.1.2\" -DPACKAGE_BUGREPORT=\"[email protected]\" -DPACKAGE_URL=\"\" -DPACKAGE=\"freedom-metal\" -DVERSION=\"v0.1.2\" -I. -I/home/ssheikh/freedom-e-sdk/freedom-metal -lriscv_metal_ -D__METAL_MACHINE_HEADER=\"/home/ssheikh/freedom-e-sdk/bsp/freedom-e310-arty/metal.h\" -march=rv32imac -mabi=ilp32 -g -mcmodel=medany -MT src/drivers/libriscv__mmachine__freedom-e310-arty_a-sifive,fe310-g000,pll.o -MD -MP -MF src/drivers/.deps/libriscv__mmachine__freedom-e310-arty_a-sifive,fe310-g000,pll.Tpo -c -o src/drivers/libriscv__mmachine__freedom-e310-arty_a-sifive,fe310-g000,pll.o test -f 'src/drivers/sifive,fe310-g000,pll.c' || echo '/home/ssheikh/freedom-e-sdk/freedom-metal/'src/drivers/sifive,fe310-g000,pll.c In file included from /home/ssheikh/freedom-e-sdk/freedom-metal/metal/drivers/sifive,uart0.h:11:0, from /home/ssheikh/freedom-e-sdk/bsp/freedom-e310-arty/metal.h:34, from /home/ssheikh/freedom-e-sdk/freedom-metal/metal/machine.h:8, from /home/ssheikh/freedom-e-sdk/freedom-metal/src/drivers/sifive,fe310-g000,pll.c:7: /home/ssheikh/freedom-e-sdk/freedom-metal/metal/uart.h: In function 'metal_uart_putc': /home/ssheikh/freedom-e-sdk/freedom-metal/metal/uart.h:50:91: error: 'const struct metal_uart_vtable' has no member named '__sputc_r' inline int metal_uart_putc(struct metal_uart *uart, unsigned char c) { return uart->vtable->putc(uart, c); } ^~ /home/ssheikh/freedom-e-sdk/freedom-metal/metal/uart.h: In function 'metal_uart_getc': /home/ssheikh/freedom-e-sdk/freedom-metal/metal/uart.h:58:106: error: macro "getc" passed 2 arguments, but takes just 1 inline int metal_uart_getc(struct metal_uart *uart, unsigned char *c) { return uart->vtable->getc(uart, c); } ^ /home/ssheikh/freedom-e-sdk/freedom-metal/metal/uart.h:58:92: warning: return makes integer from pointer without a cast [-Wint-conversion] inline int metal_uart_getc(struct metal_uart *uart, unsigned char *c) { return uart->vtable->getc(uart, c); } ~~~~~~~~~~~~^~~~~~ make[1]: *** [src/drivers/libriscv__mmachine__freedom-e310-arty_a-sifive,fe310-g000,pll.o] Error 1 make[1]: Leaving directory /home/ssheikh/freedom-e-sdk/bsp/freedom-e310-arty/build'
make: *** [/home/ssheikh/freedom-e-sdk/bsp//freedom-e310-arty/install/stamp] Error 2

Could not build openOCD

I tried to do build tools to build the software toolchain and I came upon this error:

src/Makefile.am:4: error: bad characters in variable name '%C%_openocd_SOURCES' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:7: error: bad characters in variable name '%C%_libopenocd_la_SOURCES' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:11: error: bad characters in variable name '%C%_openocd_LDADD' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:13: error: bad characters in variable name '%C%_openocd_LDADD' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:16: error: bad characters in variable name '%C%_openocd_LDADD' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:18: error: bad characters in variable name '%C%_openocd_LDADD' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:21: error: bad characters in variable name '%C%_libopenocd_la_CPPFLAGS' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:26: error: bad characters in variable name '%C%_libopenocd_la_CPPFLAGS' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:27: error: bad characters in variable name '%C%_libopenocd_la_CPPFLAGS' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:29: error: bad characters in variable name '%C%_libopenocd_la_CPPFLAGS' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:30: error: bad characters in variable name '%C%_libopenocd_la_CPPFLAGS' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:31: error: bad characters in variable name '%C%_libopenocd_la_CPPFLAGS' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:35: error: bad characters in variable name '%C%_libopenocd_la_CPPFLAGS' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:38: error: bad characters in variable name '%C%_libopenocd_la_LDFLAGS' Makefile.am:143: 'src/Makefile.am' included from here src/Makefile.am:46: error: bad characters in variable name '%C%_libopenocd_la_LIBADD' Makefile.am:143: 'src/Makefile.am' included from here doc/Makefile.am:2: error: bad characters in variable name '%C%_openocd_TEXINFOS' Makefile.am:144: 'doc/Makefile.am' included from here Makefile.am:46: warning: wildcard $(srcdir: non-POSIX variable name Makefile.am:46: (probably a GNU make extension) Makefile.am: installing './INSTALL' Makefile.am: installing './depcomp'

Any ideas how to fix this? Thanks in advance

not able to configure and make bare matal program

Dear Experts,
I tried compiling the timer-interrupt program in freedom-sdk. I encountered " can't link soft-float modules with double-float modules" error. Can someone suggest me what to do next or guide in resolving the error.

The tool chain details are at the end.

sathya281:~/freedom-e-sdk$ make PROGRAM=timer-interrupt TARGET=coreip-s51-arty CONFIGURATION=release software
cd /home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/build/release/ &&
CFLAGS="-march=rv64imac -mabi=lp64 -mcmodel=medany -ffunction-sections -fdata-sections -I/home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/install/include -Os"
/home/sathya/freedom-e-sdk/freedom-metal/configure
--host=riscv64-unknown-elf
--prefix=/home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/install
--libdir=/home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/install/lib/release
--disable-maintainer-mode
--with-preconfigured
--with-machine-name=coreip-s51-arty
--with-machine-header=/home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/metal.h
--with-machine-ldscript=/home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/metal.default.lds
--with-builtin-libgloss
checking for a BSD-compatible install... /usr/bin/install -c
checking whether build environment is sane... yes
checking for riscv64-unknown-elf-strip... riscv64-unknown-elf-strip
checking for a thread-safe mkdir -p... /bin/mkdir -p
checking for gawk... gawk
checking whether make sets $(MAKE)... yes
checking whether make supports nested variables... yes
checking whether to enable maintainer-specific portions of Makefiles... no
checking for riscv64-unknown-elf-gcc... riscv64-unknown-elf-gcc
checking whether the C compiler works... no
configure: error: in /home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/build/release': configure: error: C compiler cannot create executables See config.log' for more details
scripts/libmetal.mk:17: recipe for target '/home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/build/release/Makefile' failed
make: *** [/home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/build/release/Makefile] Error 77

On checking the config.log, I found that
config.log

configure:2862: $? = 0
configure:2882: checking whether the C compiler works
configure:2904: riscv64-unknown-elf-gcc -march=rv64imac -mabi=lp64 -mcmodel=medany -ffunction-sections -fdata-sections -I/home/sathya/freedom-e-sdk/bsp/coreip-s51-arty/install/include -Os conftest.c >&5
/media/sathya/secondary_drive/tools/lib/gcc/riscv64-unknown-elf/8.2.0/../../../../riscv64-unknown-elf/bin/ld: /tmp/cctas67H.o: can't link soft-float modules with double-float modules
/media/sathya/secondary_drive/tools/lib/gcc/riscv64-unknown-elf/8.2.0/../../../../riscv64-unknown-elf/bin/ld: failed to merge target specific data of file /tmp/cctas67H.o
collect2: error: ld returned 1 exit status

Note:
sathya@sathya-HP-EliteDesk-800-G1-TWR:~/freedom-e-sdk$ openocd -version
Open On-Chip Debugger 0.10.0+dev-00529-g9fac2de (2019-03-19-12:48)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
openocd: invalid option -- 'e'

sathya@sathya-HP-EliteDesk-800-G1-TWR:~/freedom-e-sdk$ riscv64-unknown-elf-gcc --version
riscv64-unknown-elf-gcc (GCC) 8.2.0
Copyright (C) 2018 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

SPI example

Right now, there is no example of using the SPI functionality of the board. It is not entirely trivial to figure it out using the documentation only.

FYI I've created a demo that drives a small oled display from the HiFive board through SPI that may be useful as example...

Could file this as a pull request but I think it is too specific. I had the PMOD laying around from past FPGA experiments. Also from #41 I understand the plan is to make a separated demo repository.

Arty E300 GPIO inputs not working

Hi,

I tried to read from a GPIO pin which is connected to 3.3V on the Arty Board. I would expect to read a '1' but I read a '0'. This is the code for GPIO pin 8:

int main()
{
    GPIO_REG(GPIO_OUTPUT_EN) &= ~(1 << PIN_8_OFFSET);
    GPIO_REG(GPIO_INPUT_EN) |= (1 << PIN_8_OFFSET);

    printf("%x\n", GPIO_REG(GPIO_INPUT_VAL) >> PIN_8_OFFSET);
}

Am I missing something?

Cheers,
Bastian

Building Metal requires a SiFive Toolchain

Hello,

I am facing issue building the sample demo applications for SiFive HiFive1 board.
I have mentioned this issue in the riscv-gnu-toolchain repository reference can be found here.

As per comments from @jim-wilson It seems the issue is with the usage of CLIC CSRs in the freedom-metal sources which has CLINT as per the specifications of the FE310 SoC.

In the meantime I will look for the riscv toolchain binary release which should be compatible with freedom-e-sdk build.

Regards,
Ameya Vikram Singh

Fails to build on Gentoo

Trying to issue make tools on Gentoo fails while compiling GCC. Here's the build log. The failures seem to be happening while building the graphite polyhedral optimizer. I am on GCC 7.3.0.

demo_gpio on zedboard

Hello,

I would like to know how I can run demo_gpio on a rocket core from a zedboard in the same way as hello (./fesvr-zynq pk hello) ?
Is that possible ?

Thank you

demo_gpio: mtvec set incorrectly to handle_trap

The demo as-is doesn't handle the interrupts (timer or external) correctly.

During _init, we set MTVEC to handle_trap. But handle_trap is a C function which expects various things to be in registers and on the stack. We need an assembly level wrapper around this (which I believe we had in previous versions of the demo). I'll fix this.

Cannot build projects including "platform.h" file

Attempting to perform: make BSP=mee PROGRAM=led_fade BOARD=sifive-hifive1 software

Results in the following:

led_fade.c:7:10: fatal error: platform.h: No such file or directory
 #include "platform.h"
          ^~~~~~~~~~~~
compilation terminated.

Make plic_driver universally accessible

Currently, plic_driver.c and plic_driver.h are only included as a part of the demo_gpio demo application. The functionality of these files is useful beyond that application and will probably be reimplemented with new additions to software/, both by SiFive and third-party users of the SDK.

A precedent worth mimicking can found in the RIOT-OS RTOS [1] code structure where drivers for third-party accessories and internal SoC devices are held in top-level directories: 'drivers' and 'sys', respectively. They are then included through a Makefile reference allowing each application to share them in a reusable fashion.

Thanks.

[1] https://github.com/RIOT-OS/RIOT/

freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/guile/scm-ports.c:146:10: error: ‘scm_new_port_table_entry’ was not declared in this scope

I am trying to build the SDK using make tools BOARD=freedom-e300-hifive1 as described in the readme, but the build fails:

[...]
g++ -x c++  -g -O2   -I. -I$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb -I$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/common -I$BASEDIR/freedom-e-sdk/riscv-gnu-t
oolchain/riscv-binutils-gdb/gdb/config -DLOCALEDIR="\"$BASEDIR/freedom-e-sdk/work/build/riscv-gnu-toolchain/riscv64-unknown-elf/prefix/share/locale\"" -DHAVE_CONFIG_H -I$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-
gdb/gdb/../include/opcode -I$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/../opcodes/.. -I$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/../readline/.. -I$BASEDIR/fr
eedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/../zlib -I../bfd -I$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/../bfd -I$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/../include -
I../libdecnumber -I$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/../libdecnumber  -I$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/gnulib/import -Ibuild-gnulib/import   -DTUI=1   -pthread 
-I/usr/include/guile/2.2 -I/usr/include/python3.6m -I/usr/include/python3.6m -Wall -Wpointer-arith -Wno-unused -Wunused-value -Wunused-function -Wno-switch -Wno-char-subscripts -Wempty-body -Wunused-but-set-parameter -Wunused-but-set-variable -Wno-sign-compare -Wno-narrowi
ng -Wno-error=maybe-uninitialized  -c -o scm-ports.o -MT scm-ports.o -MMD -MP -MF .deps/scm-ports.Tpo $BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/guile/scm-ports.c                                                                 
$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/guile/scm-ports.c: In function ‘scm_unused_struct* ioscm_open_port(scm_t_bits, long int)’:                                                                                              
$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/guile/scm-ports.c:146:10: error: ‘scm_new_port_table_entry’ was not declared in this scope                                                                                              
   port = scm_new_port_table_entry (port_type);                                                                                                                                                                                                                                  
          ^~~~~~~~~~~~~~~~~~~~~~~~                                                                                                                                                                                                                                               
$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/guile/scm-ports.c:146:10: note: suggested alternative: ‘scm_c_weak_table_put_x’                                                                                                         
   port = scm_new_port_table_entry (port_type);                                                                                                                                                                                                                                  
          ^~~~~~~~~~~~~~~~~~~~~~~~                                                                                                                                                                                                                                               
          scm_c_weak_table_put_x                                                                                                                                                                                                                                                 
$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/guile/scm-ports.c: In function ‘int ioscm_fill_input(SCM)’:                                                                                                                             
$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/guile/scm-ports.c:231:20: error: ‘SCM_PTAB_ENTRY’ was not declared in this scope                                                                                                        
   scm_t_port *pt = SCM_PTAB_ENTRY (port);                                                                                                                                                                                                                                       
                    ^~~~~~~~~~~~~~                                                                                                                                                                                                                                               
$BASEDIR/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/gdb/guile/scm-ports.c:231:20: note: suggested alternative: ‘SCM_VTABLE_NAME’                                                                                                                
   scm_t_port *pt = SCM_PTAB_ENTRY (port);                                                                                                                                                                                                                                       
                    ^~~~~~~~~~~~~~                                                                                                                                                                                                                                               
                    SCM_VTABLE_NAME
[...]

$BASEDIR in the output above refers to the directory into which I checked out the freedom-e-sdk and is not an actual directory nor does this string actually appear in the output.

The issue appears to be the same as riscv-rust/riscv-rust-toolchain#6.

I am using Arch Linux on this machine. Guile 2.2.3 is installed.

Hello world example does not work when run with QEMU

Hi there! Thanks for creating this great project. I appreciate the work you all are doing for the RISC-V ecosystem 🙂


Now to my issue...

Since I don't have a physical RISC-V core, I was attempting to test out the hello example from QEMU, ideally seeing the "Hello world!" pop up in my host terminal. However, when I do the following:

git clone [email protected]:sifive/freedom-e-sdk.git
cd freedom-e-sdk
make software
qemu-system-riscv32 -nographic -machine sifive_e -kernel software/hello/debug/hello.elf

I get this error output:

$ qemu-system-riscv32 -nographic -machine sifive_e -kernel software/hello/debug/hello.elf
qemu: hardware error: sifive_prci_read: read: addr=0xc

CPU #0:
 pc       20403b64
 mhartid  00000000
 mstatus  00000000
 mip      00000000
 mie      00000000
 mideleg  00000000
 medeleg  00000000
 mtvec    20401af4
 mepc     00000000
 mcause   00000000
 zero 00000000 ra   2040371e sp   800013e0 gp   80001890
 tp   00000000 t0   20404c90 t1   00000000 t2   80001108
 s0   80001400 s1   00000001 a0   80001084 a1   0000000c
 a2   80000fd8 a3   20403b64 a4   10008000 a5   1000800c
 a6   0000001f a7   00000000 s2   20404c84 s3   00000000
 s4   00000000 s5   00000000 s6   00000000 s7   00000000
 s8   00000000 s9   00000000 s10  00000000 s11  00000000
 t3   00000000 t4   00000000 t5   00000000 t6   00000000
 ft0  0000000000000000 ft1  0000000000000000 ft2  0000000000000000 ft3  0000000000000000
 ft4  0000000000000000 ft5  0000000000000000 ft6  0000000000000000 ft7  0000000000000000
 fs0  0000000000000000 fs1  0000000000000000 fa0  0000000000000000 fa1  0000000000000000
 fa2  0000000000000000 fa3  0000000000000000 fa4  0000000000000000 fa5  0000000000000000
 fa6  0000000000000000 fa7  0000000000000000 fs2  0000000000000000 fs3  0000000000000000
 fs4  0000000000000000 fs5  0000000000000000 fs6  0000000000000000 fs7  0000000000000000
 fs8  0000000000000000 fs9  0000000000000000 fs10 0000000000000000 fs11 0000000000000000
 ft8  0000000000000000 ft9  0000000000000000 ft10 0000000000000000 ft11 0000000000000000
[1]    33111 abort      qemu-system-riscv32 -nographic -machine sifive_e -kernel

I'm using v8.2.0 of the GNU riscv64-unknown-elf toolchain, which I downloaded as a prebuilt toolchain from here: https://www.sifive.com/boards. My OS is MacOS Mojave, v10.14.5. My version of QEMU is:

$ qemu-system-riscv32 --version
QEMU emulator version 4.0.0

What am I doing incorrectly?

entry.S saves too many registers

As far as I can tell, based on the riscv C calling convention, many of the registered saved in handled_trap don't actually need to be saved when calling a C interrupt handler, such as x8, x9, x18-27.

OpenOCD does not work after first use

Hello, I'm trying to debug some program on the freedom e300 arty board using openocd.
First, I uploaded the demo program demo_gpio with:
make upload PROGRAM=demo_gpio BOARD=freedom-e300-arty
After that I did:
make run_openocd
make run gdb
in two separate terminal windows.
After connecting the gdb to the server provided by openocd, I tried to do one "(gdb) next" operation and got an infinite number of:
program halted at
Upon that, i closed the windows to stop the infinite loop.
Now, I can neither upload new programs, nor debug the program already on the board.
This is the error message I get when trying to run openocd with make run_openocd:
Error: no device found
Error: unable to open ftdi device with vid 0403, pid 6010, description 'Dual RS232-HS', serial '' at bus location ''
Restarting my computer, disconnecting and reconnecting the board and resetting the board did not help.
Any idea how to resolve this issue would be greatly appreciated.

external RAM

Is there already a memory controller for the external ddr3 ram on the digilent arty board shipped with the freedom-e-sdk?
If so, how can I set it up so that I can store data in this ram?
As always, thanks in advance.

feedom-e-sdk upload demo occur errors

When I upload demo to fpga, there are some errors, as follow:

cailinlin@cailinlin-Lenovo-Invalid-entry-length-16-Fixed-up-to-11:~/RISCV/freedom-e-sdk$ make upload [PROGRAM=demo_gpio] [BOARD=coreplexip-e31-arty]
work/build/openocd/prefix/bin/openocd -f bsp/env/coreplexip-e31-arty/openocd.cfg &
/home/cailinlin/RISCV/freedom-e-sdk/work/build/riscv-gnu-toolchain/riscv64-unknown-elf/prefix/bin/riscv64-unknown-elf-gdb software/hello/hello --batch -ex "set remotetimeout 240" -ex "target extended-remote localhost:3333" -ex "monitor reset halt" -ex "monitor flash protect 0 64 last off" -ex "load" -ex "monitor resume" -ex "monitor shutdown" -ex "quit" &&
echo "Successfully uploaded 'hello' to coreplexip-e31-arty."
Open On-Chip Debugger 0.10.0+dev (2018-03-22-10:28)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 10000 kHz
Info : auto-selecting first available session transport "jtag". To override use 'transport select '.
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
Info : clock speed 10000 kHz
Info : JTAG tap: riscv.cpu tap/device found: 0x20000913 (mfg: 0x489 (SiFive, Inc.), part: 0x0000, ver: 0x2)
Info : dtmcontrol_idle=5, dmi_busy_delay=1, ac_busy_delay=0
Info : dtmcontrol_idle=5, dmi_busy_delay=2, ac_busy_delay=0
Info : dtmcontrol_idle=5, dmi_busy_delay=3, ac_busy_delay=0
Info : dtmcontrol_idle=5, dmi_busy_delay=4, ac_busy_delay=0
Info : Disabling abstract command reads from CSRs.
Info : Disabling abstract command writes to CSRs.
Info : [0] Found 2 triggers
Info : Examined RISC-V core; found 1 harts
Info : hart 0: XLEN=32, 2 triggers
Info : Listening on port 3333 for gdb connections
Ready for Remote Connections
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : accepting 'gdb' connection on tcp/3333
Error: FESPI_WRITE_REG error
Error: auto_probe failed
Error: Connect failed. Consider setting up a gdb-attach event for the target to prepare target for GDB connect, or use 'gdb_memory_map disable'.
Error: attempted 'gdb' connection rejected
Remote connection closed
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
"monitor" command not supported by this target.
"monitor" command not supported by this target.
Successfully uploaded 'hello' to coreplexip-e31-arty.

I do not know how to solve this problem, Can you help me to solve it?
Thanks!

Build error in openocd with recent gcc

openocd builds with -Werror, and this warning occurs with gcc 6.2.1:

In file included from /home/thomas/sandbox/freedom-e-sdk/openocd/src/target/riscv/riscv.c:12:0:
/home/thomas/sandbox/freedom-e-sdk/openocd/src/target/riscv/riscv.c: In function ‘riscv_examine’:
/home/thomas/sandbox/freedom-e-sdk/openocd/src/target/riscv/riscv.c:61:69: error: left shift of negative value [-Werror=shift-negative-value]
 #define get_field(reg, mask) (((reg) & (mask)) / ((mask) & ~((mask) << 1)))

Add a target to reprogram the FPGA

If the image on the FPGA already has a SPIFlash controller, you can actually reprogram the FPGA with OpenOCD. Let's add this as a makefile target, or at least the documentation for it.

e.g:

make program_arty BOARD=coreplexip_e31_arty MCS=my_new.mcs

Would do something like:

openocd -f bsp/env/coreplexip_e31_arty/openocd.cfg -c    "flash protect 0 0 64 off; program my_new.mcs verify 0x20000000; exit"

Note that BOARD here refers to what was PREVIOUSLY on the Arty (because it needs to know where that previous image's SPIFlash controller was in order to use it to reprogram). I guess we could come up with some other way to determine that, all that is really needed is to figure out where the SPIFlash is located.

Note that if the image DOESN'T have a SPIFlash controller, one can bootstrap it if you have e.g. the bitfile generated from the https://github.com/sifive/freedom repo using the open-source xc3sprog utility as follows:

xc3sprog -c nexys4 E300ArtyTop.bit

and then programming the desired MCS file.

This cuts the Vivado GUI out of the flow which some folks might find more convenient.

stdcbench

The README has instructions for two benchmarks: Dhrystone and the non-free Coremark.
Both benchmarks are quite biased towards certain aspects of the benchmarked system. stdcbench tries to provide an alternative to Dhrytsone and Whetstone, that is more balanced.

stdcbench, though not fully finished yet (in particular, run and reporting rules are still missing) can be found at http://www.stdcbench.org. A presentation on stdcbench was accepted (and held a week ago) at SCOPES 2018: https://dl.acm.org/citation.cfm?id=3207726
Philipp

trying to build on mac `ld: library not found for -lrt`

should i just build on ubuntu or is there osx support?

gcc -DHAVE_CONFIG_H -DWITH_DEFAULT_MODEL='"RV32G"' -DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_LITTLE   -DDEFAULT_INLINE=0   -Wall -Wdeclaration-after-statement -Wpointer-arith -Wpointer-sign -Wno-unused -Wunused-value -Wunused-function -Wno-switch -Wno-char-subscripts -Wmissing-prototypes -Wdeclaration-after-statement -Wempty-body -Wmissing-parameter-type -Wold-style-declaration -Wold-style-definition -Wformat-nonliteral      -I. -I/Users/me/src/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/sim/riscv -I../common -I/Users/me/src/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/sim/riscv/../common -I../../include -I/Users/me/src/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/sim/riscv/../../include -I../../bfd -I/Users/me/src/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/sim/riscv/../../bfd -I../../opcodes -I/Users/me/src/freedom-e-sdk/riscv-gnu-toolchain/riscv-binutils-gdb/sim/riscv/../../opcodes -I../../intl -g -O2 -Wl,-no_pie  -o run \
	  nrun.o libsim.a ../../bfd/libbfd.a ../../opcodes/libopcodes.a ../../intl/libintl.a -liconv ../../libiberty/libiberty.a -L../../zlib -lz -lrt -ldl
ld: library not found for -lrt
clang: error: linker command failed with exit code 1 (use -v to see invocation)

8 bit access to CLIC

I noticed 8 bit peripheral accesses (uint8_t) are used in CLIC driver.

https://github.com/sifive/freedom-e-sdk/blob/clic-vectored/bsp/drivers/clic/clic_driver.c

The standard bus width for peripherals on 32 bit and probably 64 bit systems is 32 bits. And it is unusual to access peripheral registers with cycles smaller then 32 bits (64 bit accesses could be split by the interconnect). Many (probably most most) peripherals do not have byte select signals, therefore all registers have to be accessed as a single unit. I usually configured the peripheral bus to return bus errors if smaller then 32 bit write accesses were made.

So I was surprised to find 8 bit accesses to memory mapped CLIC registers. Is this a part of an encoding scheme to make the address space smaller, so immediate offset instructions could be used? Or is there another reason?

Some doubts about "make upload".

Which address is the application(like gpio-demo) written at?

If that address is the base address of flash, will it override the .mcs file which is downloaded into the flash before the setup of SoC for FPGA configuration?

SMP program on multicore

Hello all,
I tried to execute the SMP program on a LowRISC v2.0 (untethered Rocket) running bare metal on a XIlinx kc705 FPGA and the only output I get is from core 0. I have doubled checked the configuration (both in spike simulation and from the actuall implementation in Xilinx Vivado) and indeed there are more than one cores instantiated. I am not compilinf the smp.c through the makefile provided , but I am cross-compiling it from my host PC with riscv-tools (riscv64-unknown-linux-gnu-gcc).
The only modification I have made is change the amoswap.w.aqrl instruction to two separate functions (one for the aquire amoswap.w.aq and one for the release aquire amoswap.w.rl) called from the respective line of the smp.c. That was due to assembler compiling issues.
If my modification is not the reason that the script is not outputing the right (for my case) number of cores then can someone pinpoint a possible reason?
Plus by looking at the code I cannot make clear where does the second processor comes into play to output his own ID (hartid).
Thank you in advance!

Permission denied (publickey)

It seems that the permission setting is not correct:

$ git submodule update --init --recursive
Cloning into '/home/hyf/freedom-e-sdk/software/local-interrupt'...
[email protected]: Permission denied (publickey).
fatal: Could not read from remote repository.

Please make sure you have the correct access rights
and the repository exists.
fatal: clone of '[email protected]:sifive/example-local-interrupt.git' into submodule path '/home/hyf/freedom-e-sdk/software/local-interrupt' failed
Failed to clone 'software/local-interrupt'. Retry scheduled
Cloning into '/home/hyf/freedom-e-sdk/software/software-interrupt'...
[email protected]: Permission denied (publickey).
fatal: Could not read from remote repository.

Please make sure you have the correct access rights
and the repository exists.
fatal: clone of '[email protected]:sifive/example-software-interrupt.git' into submodule path '/home/hyf/freedom-e-sdk/software/software-interrupt' failed
Failed to clone 'software/software-interrupt'. Retry scheduled
Cloning into '/home/hyf/freedom-e-sdk/software/timer-interrupt'...
[email protected]: Permission denied (publickey).
fatal: Could not read from remote repository.

Please make sure you have the correct access rights
and the repository exists.
fatal: clone of '[email protected]:sifive/example-timer-interrupt.git' into submodule path '/home/hyf/freedom-e-sdk/software/timer-interrupt' failed
Failed to clone 'software/timer-interrupt'. Retry scheduled
Cloning into '/home/hyf/freedom-e-sdk/software/local-interrupt'...
[email protected]: Permission denied (publickey).
fatal: Could not read from remote repository.

Please make sure you have the correct access rights
and the repository exists.
fatal: clone of '[email protected]:sifive/example-local-interrupt.git' into submodule path '/home/hyf/freedom-e-sdk/software/local-interrupt' failed
Failed to clone 'software/local-interrupt' a second time, aborting

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