Topic: vlsi-physical-design Goto Github
Some thing interesting about vlsi-physical-design
Some thing interesting about vlsi-physical-design
vlsi-physical-design,This repository documents my work on Advanced Physical Design Using OpenLANE/Sky130. The objective of this project was to implement an opensource RTL2GDS flow using OpenLANE and opensource PDK provided by Google/SkyWater130
User: aasthadave9
vlsi-physical-design,Complete design of USART interface with baud rate selection
User: akshayxpatil
vlsi-physical-design,Some simple examples for the Magic VLSI physical chip layout tool.
User: andrsmllr
vlsi-physical-design,Some simple examples for the Magic VLSI physical chip layout tool using Google Skywater130 PDK.
User: andrsmllr
vlsi-physical-design,Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
User: angelojacobo
vlsi-physical-design,Standard Cell Library based Memory Compiler using FF/Latch cells
Organization: aucohl
vlsi-physical-design,vrom compiler
User: bha2r00
vlsi-physical-design,Steiner Shallow-Light Tree for VLSI Routing
User: chengengjie
vlsi-physical-design,NTHU CS6135 VLSI Physical Design Automation (2022 Fall)
User: curry0622
Home Page: https://eeclass.nthu.edu.tw/course/9237
vlsi-physical-design,Standard cell placement (global and detailed) tool based on modified algorithm “simulated annealing”
User: en9inerd
vlsi-physical-design,reproduction paper research in low voltage clock tree design
User: erihsu
vlsi-physical-design,5 Day TCL begginer to advanced training workshop by VSD
User: fayizferosh
vlsi-physical-design,This is a SpyDrNet Plugin for a physical design related transformations
User: ganeshgore
Home Page: https://ganeshgore.github.io/spydrnet-physical/
vlsi-physical-design,This project give overview of RTL to GDSII of universal shift register using OpenLane and Skywater130 PDK. OpenLane is an automated open-source EDA tool which gives RTL to GDSII flow.
User: harshithsn
vlsi-physical-design,Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.
User: hibagus
vlsi-physical-design,IEEE DATC Robust Design Flow 2021.
Organization: ieee-ceda-datc
vlsi-physical-design,DATC RDF
Organization: ieee-ceda-datc
vlsi-physical-design,A LEF/DEF Utility.
User: jinwookjungs
vlsi-physical-design,VLSI CAD Algorithm Visualizations implemented as Java Applications
User: jnestor
vlsi-physical-design,Animation of VLSI Placement/Floorplanning using Simulated Annealing or Iterative Improvement
User: jnestor
vlsi-physical-design,A simple tool to demonstrate the physical design steps of VLSI Design Flow.
User: karthik-r-rao
vlsi-physical-design,
User: kevinwang96
vlsi-physical-design,Coursework of NTHU CS613500 VLSI Physical Design Automation
User: koyama-tsubasa
vlsi-physical-design,Entries for the 2023 5th National College Student Integrated Circuit EDA Elite Challenge. SoC chip physical layout static IR drop prediction project based on methods such as image processing and NLP unsupervised learning.
User: lawrence-leung
vlsi-physical-design,Deep learning toolkit-enabled VLSI placement
User: limbo018
vlsi-physical-design,Alliance VLSI CAD Tools (LIP6)
Organization: lip6
Home Page: https://coriolis.lip6.fr
vlsi-physical-design,Coriolis VLSI EDA Tool (LIP6)
Organization: lip6
Home Page: https://coriolis.lip6.fr
vlsi-physical-design,VLSI EDA Global Router
User: luckyrantanplan
Home Page: http://www.cs.nthu.edu.tw/~tcwang/nthuroute/
vlsi-physical-design,
User: meeeeet
vlsi-physical-design,
User: muballighhossain
vlsi-physical-design,Latex source files for a research paper on improving placement algorithms used in VLSI design process
User: naderabdalghani
vlsi-physical-design,This repository contains python code snippets that implement several algorithms for automating the VLSI Physical Design process. This is based on the learnings from the course - EE5333W (Introduction to Physical Design Automation) at IITM.
User: neeraj1397
vlsi-physical-design,A High-performance Timing Analysis Tool for VLSI Systems
Organization: opentimer
vlsi-physical-design,A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
Organization: opentimer
vlsi-physical-design,A Standalone Structural Verilog Parser
Organization: opentimer
vlsi-physical-design,Contains vim dotfiles configured for verilog, C++ & some stuff for VLSI
User: rithiknambiar
vlsi-physical-design,VLSI Physical Design
User: salomedevkule7
vlsi-physical-design,This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In this project, a PicoRV32a SoC is taken and then the RTL to GDSII Flow is implemented with Openlane using Skywater130nm PDK. Custom-designed standard cells with Sky130 PDK are also used in the flow. Timing Optimisations are carried out. Slack violations are removed. DRC is verified
User: shariethernet
vlsi-physical-design,This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK
User: shontaware
vlsi-physical-design,Domain Specific Hardware Accelerators - VLSI CAD Project
User: sooryakiran
vlsi-physical-design,Two Address Instructions (16bit) CPU
User: srfunksensei
vlsi-physical-design,A SAT-Based cell router.
User: srgrr
vlsi-physical-design,In electronics, a multiplexer (or mux; spelled sometimes as multiplexer, also known as a data selector, is a device that selects between several analog or digital input signals and forwards the selected input to a single output line.
User: suhailahamed2000
vlsi-physical-design,Micro-Framework for FPGA / VLSI Design Flow in Python
User: tobiaskaiser
Home Page: https://pydesignflow.readthedocs.io/
vlsi-physical-design,VLSI Design, Magic, OpenCircuitDesign,CMOS VLSI Design, CMOS Inverter Magic
User: trojanink
vlsi-physical-design,Courseworks of CS6165 VLSI Physical Design Automation, NTHU.
User: twweeb
vlsi-physical-design,Examples of the TCL Scripts for different purposes and for VLSI Physical Design are provided here for your reference
User: udayashankars
vlsi-physical-design,This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specifications, RTL DV, Synthesis, Physical Design, Signoff and Finally Tape-It-Out
User: vardhansuroshi
vlsi-physical-design,This is a documentation of the steps involved in designing a VCO on the SYNOPSYS Custom Compiler - 28nm PDK
User: virginrobotics
Home Page: https://analog.hackathoniith.in/home
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