Topic: fpga-accelerator Goto Github

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ahmederady / grad_project
fpga-accelerator,Smart Automation Controller for Precision Agriculture
User: ahmederady
avalon-mm convolutional-neural-networks depthwise-convolutions depthwise-separable-convolutions depthwiseconv2d fpga fpga-accelerator fpga-programming fpga-soc fpga-soc-linux matrix-multiplication mobilenet peripherals python research-project tensorflow tensorflow-examples tensorflow-lite vhdl

akzare / hardorb
fpga-accelerator,TCP/IP and UDP/IP protocol stack off-loading
User: akzare
fpga-accelerator tcpip-offloading soc-verification

alimpk / transfomers-silicon-research
fpga-accelerator,Research and Materials on Hardware implementation of Transformer Model
User: alimpk
accelerator bert fpga-accelerator gpu-acceleration hardware-designs pretrained-models processing-in-memory research-paper systolic-arrays transformer

andrei-ace / yoga-ai
fpga-accelerator,Predicting 3D human pose from single image using a VCK5000 Versal Development Card
User: andrei-ace
deep-learning computer-vision fpga-accelerator

anshutrivedi / intel-edge-ai-for-iot-developers-nanodegree-program
fpga-accelerator,This repository contains detailed notes of all chapters and all three projects completed in Intel-Edge-AI NanoDegree.
User: anshutrivedi
openvino-toolkit modelcompression edge-ai gpu-acceleration vpu fpga-accelerator myriad

azazhassankhan / low_latency_hardware_accelerator_for_stockmarket_indicators
fpga-accelerator,📈 Welcome to the repository that powers the future of stock market analysis with lightning-fast hardware acceleration on FPGA! ⚡️
User: azazhassankhan
c compare fpga-accelerator hft-trading trading-bot vhdl

cameronshinn / tiny-tpu
fpga-accelerator,Small-scale Tensor Processing Unit built on an FPGA
User: cameronshinn
tpu tpu-acceleration fpga fpga-accelerator neural-network convolutional-neural-networks

dal3x / somewhat-homomorphic-encryption-system
fpga-accelerator,Implementation of a somewhat homomorphic encryption system using an FPGA hardware accelerator. This project was part of my bachelor's thesis at KIT and developed in four months.
User: dal3x
bachelor-thesis educational-project fpga fpga-accelerator homomorphic-encryption

doctor3w / hls-cryptography-accelerator
fpga-accelerator,A crypto accelerator written for HLS to an FPGA that actually makes it slower than running it on your computer
User: doctor3w
high-level-synthesis fpga-accelerator

doonny / pipecnn
fpga-accelerator,An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
User: doonny
altera-opencl-sdk deep-learning deep-neural-networks fpga fpga-accelerator hardware hls opencl

dpretet / bster
fpga-accelerator,Implementation of a binary search tree algorithm in a FPGA/ASIC IP
User: dpretet
binary-tree binary-trees systemverilog verilog ip svut bst bstree asic asic-design

er1cz / deploying_cnn_on_fpga_using_opencl
fpga-accelerator,Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design contest.
User: er1cz
cnn-classification fpga-accelerator opencl

erictaur / large-scale-reconfigurable-neuromorphic-architecture
fpga-accelerator,FPGA based design
User: erictaur
fpga fpga-accelerator verilog

essenceia / blake2
fpga-accelerator,Blake2 RTL implementation
User: essenceia
Home Page: https://essenceia.github.io/projects/blake2/
blake2 blake2b blake2s cryptography hashing rtl asic asic-design fpga fpga-accelerator

floyedshen / mnist_hls
fpga-accelerator,Lenet for MNIST handwritten digit recognition using Vivado hls tool
User: floyedshen
mnist-hls hls vivado vivado-hls fpga-accelerator zedboard zynq

google / qkeras
fpga-accelerator,QKeras: a quantization deep learning library for Tensorflow Keras
Organization: google
deep-learning quantization quantized-neural-networks hardware-acceleration quantized-networks tensorflow keras machine-learning asic-design fpga

gsneha26 / darwin-wga
fpga-accelerator,Co-processor for whole genome alignment
User: gsneha26
aws-f1 fpga-accelerator tbb whole-genome-alignment

hajin-kim / fpga_axi_and_vhdl
fpga-accelerator,FPGA with Xilinx Vitis HLS and ZYNQ board. AXI and VHDL: Simple Multiplier, AXI and VHDL: DoGain
User: hajin-kim
cpu fpga vhdl low-level fpga-programming fpga-accelerator

hajin-kim / fpga_tutorial_with_hls
fpga-accelerator,FPGA with Xilinx Vitis HLS, Vivado, Vitis, and ZYNQ board. Working with HLS, Matrix Multiplier with HLS
User: hajin-kim
fpga vhdl low-level cpu fpga-programming fpga-accelerator

hibagus / 64pointfftprocessor
fpga-accelerator,Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.
User: hibagus
digital-signal-processing fast-fourier-transform fpga-accelerator signal-processing vlsi-design vlsi-physical-design vlsi-project

hossein1387 / barvinn
fpga-accelerator,BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/
User: hossein1387
deep-neural-networks fpga-accelerator machine-learning quantization risc-v

hsharma35 / dnnweaver2
fpga-accelerator,Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.
User: hsharma35
deep-neural-networks fpga fpga-accelerator

jofrfu / tinytpu
fpga-accelerator,Implementation of a Tensor Processing Unit for embedded systems and the IoT.
User: jofrfu
fpga fpga-accelerator tensorflow tensor tpu vhdl zynq xilinx vivado assembly

jtp75 / advanced-digital-design
fpga-accelerator,University of Pittsburgh ECE 1195
User: jtp75
data-path finite-state-machine fpga fpga-accelerator hardware hardware-acceleration mips32cpu vhdl-coursework vivado vivado-hls

kevinwang96 / network_packet_classification_on_fpga
fpga-accelerator,Network Packet classification on FPGA
User: kevinwang96
bitonic-merge-sort fpga fpga-accelerator network packet-classification

leos313 / doom_fpga
fpga-accelerator,Accelerating a Classic 3D Video Game (The DOOM) on Heterogeneous Reconfigurable MPSoCs
User: leos313
doom fpga mpsoc fpga-soc-linux fpga-accelerator fpga-game chocolate-doom accelerate hardware-acceleration vivado

lirui-shanghaitech / a-convolution-kernel-implemented-by-vivado-hls
fpga-accelerator,This project implements a convolution kernel based on vivado HLS on zcu104
User: lirui-shanghaitech
Home Page: https://lirui-shanghaitech.github.io
convolution fpga-accelerator hls vivado-hls

lirui-shanghaitech / cnn-accelerator-vlsi
fpga-accelerator,Convolutional accelerator kernel, target ASIC & FPGA
User: lirui-shanghaitech
accelerator asic-design cnn cnn-accelerator cnn-digital fpga fpga-accelerator

manwlis / fpga-accelerated-hadamard-products-with-threshold
fpga-accelerator,Reconfigurable Digital Systems HRY591-project.
User: manwlis
vivado-hls xilinx-sdsoc fpga-accelerator university-project

matthiaskonrath / rc4-verilog
fpga-accelerator,EXPERIMENTAL Verilog (and HLS, C++, Python, OpenCL) implementation of the RC4 stream cipher.
User: matthiaskonrath
verilog rc4 cpp python opencl xilinx-vivado xilinx-hls fpga-accelerator

max-exner / turbodeb
fpga-accelerator,TURBOdeb #xohw19-157 #TuringBombe #Enigma
User: max-exner
turing-bombe enigma fpga-accelerator fpga encryption architecture

microdynamics-cpu / tree-core-sim
fpga-accelerator,A lightweight cloudFPGA prototype for processor simulation. It provides online scalable route resources with only open source synthesis toolset.
Organization: microdynamics-cpu
cloud-computing fpga-accelerator riscv-simulator virtualization cluster-computing distrubuted-systems

mmattioli / hardware-sort
fpga-accelerator,Hardware-accelerated sorting algorithm
User: mmattioli
fpga fpga-accelerator hardware-acceleration sorting-algorithm

mpdg837 / korelator-cyfrowy
fpga-accelerator,Projekt zaliczeniowy w ramach przedmiotu "Systemy Cyfrowe". Projekt miał na celu stworzenie układu DSP do pomiaru odległości za pomocą odbitego światła lasera. Wykonano układ który można finalnie uruchomić na płytce Cyclone IV Altera (model EP4CE6E22), który można sterować bezpośrednio na płytce. Objaśnienie projektu znajduje się w załączonym do repozytorium raporcie
User: mpdg837
fpga fpga-accelerator fpga-board fpga-programming

nikhilmukraj / spiking-neural-networks-hardware
fpga-accelerator,An FPGA design for simulating biological neurons
User: nikhilmukraj
biological-neurons fpga-accelerator izhikevich-neurons neural-network systemverilog-hdl verilog-project computational-biology

os-hxfan / bayesnn_fpga
fpga-accelerator,FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.
User: os-hxfan
bayesian-neural-networks deep-learning fpga-accelerator

pedrovt / cr-square-root-cop
fpga-accelerator,A FPGA Based Square Root Approximation Coprocessor
User: pedrovt
fpga fpga-accelerator fpga-soc nexys4 square-root vhdl xilinx

rameloni / soil-segmentation-zcu102
fpga-accelerator,A heterogeneous implementation (SW/HW) of an image processing algorithm running on a Yocto-linux OS
User: rameloni
fpga fpga-accelerator linux yocto

ribesstefano / mapping-multiple-lstm-models-on-fpgas
fpga-accelerator,Includes the SVD-based approximation algorithms for compressing deep learning models and the FPGA accelerators exploiting such approximation mechanism, as described in the paper Mapping multiple LSTM models on FPGAs.
User: ribesstefano
cpp14 fpga fpga-accelerator hls machine-learning svd-matrix-factorisation vitis xilinx

rspwfpgas / opae-xilinx
fpga-accelerator,OPAE porting to Xilinx FPGA devices.
User: rspwfpgas
fpga fpga-accelerator xilinx pcie opae platform-reuse partial-reconfiguration axi

sakaserbia / fpga-de10-standard-project-nios2-dma-accelerator
fpga-accelerator,Develop DMA acceleration of the system that performs linear computing functions, Y = AX + B, large amounts of data.
User: sakaserbia
dma fpga fpga-accelerator fpga-programming vhdl fpga-soc basic-learning

samsunglabs / butterfly_acc
fpga-accelerator,The codes and artifacts associated with our MICRO'22 paper titled: "Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design"
Organization: samsunglabs
butterfly deep-learning fpga-accelerator

systemviewinc / visual-system-integrator
fpga-accelerator,Visual System Integrator - Accelerate your embedded development
Organization: systemviewinc
fpga fpga-accelerator embedded integration vivado lenet high-level-synthesis hls sdsoc sdx

tirumalnaidu / opencl-hls-cnn-accelerator
fpga-accelerator,OpenCL HLS based CNN Accelerator on Intel DE10 Nano FPGA.
User: tirumalnaidu
Home Page: https://docs.google.com/presentation/d/16nk5-PTvlzjRUD0g9FnyuJoT0aaJMx6uuWkDMwTDdCg/edit?usp=sharing
fpga-accelerator opencl de10-nano darknet-image-classification altera-opencl-sdk fpga intel-fpga-opencl neural-network-accelerator cnn-acceleration

toni3141 / rastericer
fpga-accelerator,Basic OpenGL 1.x implementation for small FPGAs (like iCE40UP5K)
User: toni3141
3d 3d-graphics fpga fpga-accelerator arduino

toni3141 / rasterix
fpga-accelerator,OpenGL 1.x implementation for FPGAs
User: toni3141
fpga fpga-accelerator opengl renderer 3d 3d-graphics

tristynferreiro / isd-po
fpga-accelerator,A parallel implementation of an Image Steganography Decode in simulation on a Nexys-A7 FPGA. The decoder expects images encoded with the least significant bit decoder.
User: tristynferreiro
fpga-accelerator nexys-a7 steganography

turtletaco / janus-c-plus-plus
fpga-accelerator,Janus Algorithm in C++ version without FPGA acceleration.
User: turtletaco
xilinx-fpga fpga-accelerator

turtletaco / janus-simulation
fpga-accelerator,Janus astrophysics Simulator implemented on ZU19EG Ultrascale+
User: turtletaco
astrophysics fpga-accelerator xilinx-fpga

twosixlabs / ultrazed_dev
fpga-accelerator,UltraZed Development
Organization: twosixlabs
hardware-acceleration high-performance-computing fpga-soc-linux fpga-accelerator zynq zedboard