zipcpu / zbasic

A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems

ZBasic

This project provides a very basic version of a working ZipCPU system. It is designed so that others (you perhaps?) can then build off of it and design with it. ZBasic has three primary goals:

• To provide a usable beginning system to allow users to get something up and running quickly

• To provide a very basic system that can then be matched with an emulator, and used to test library and compiler functionality apart from actual hardware.

• To demonstrate the utility of autofpga, and its ability to quickly, easily, and seemlessly add components to a design

If you'd like to give this a spin, consider the instructions in this article describing how to do so.

Status

The ZBasic system can now be made using autofpga, all the way from zero to Hello World successfully in Verilator testing.

License

Gisselquist Technology, LLC, is pleased to provide you access to this entire project under the GPLv3 license. If this license will not work for you, please contact me.

zbasic's Issues

Verilog Syntax Errors When Synthesizing ZBasic in Quartus

Right now I am trying my best to implement the ZBasic system on a DE10-Nano development kit. After I used AutoFPGA (to modify the amount of block RAM and change the clock speed to 50MHz) I was successfully able to simulate the design using Verliator, but I am running into synthesis errors when I bring the RTL files into a Quartus project. Below is an image of the synthesis errors I am getting:

The Quartus (17.1) project is set up where only all of the Verilog files from the RTL directory from ZBasic are included and "toplevel.v" is the top-level entity. If it means anything, I was able to get just the ZipCpu to synthesize properly in Quartus using a similar project structure. I would greatly appreciate some help getting this figured out or some advice to get pushed in the right direction. So sorry if I missed something simple. Been beating my head over this the past couple of days!

ZBasic requires the dev branch of AutoFPGA

Until the dev branch of AutoFPGA is merged, you'll need to use the dev branch to use AutoFPGA to update the ZBasic configuration.

make fails when building zbasic

I am following the instructions on : http://zipcpu.com/zipcpu/2018/02/12/zbasic-intro.html

when I try to run make under the zbasic directory, I get the following:

zip-gcc -O3 -c hello.c -o obj-zip/hello.o
make[1]: *** No rule to make target '/home/dan/work/rnd/zipcpu/sw/install/cross-tools/zip/lib/libg.a', needed by 'hello'.  Stop.
Makefile:182: recipe for target 'sw-board' failed
make: *** [sw-board] Error 2```

make error zbasic

hard coded path in /usr/local/src/zbasic/sw/board/Makefile
INSTALLD=/home/dan/work/rnd/zipcpu/sw/install

So when make is run in /usr/local/src/zbasic

g++ -g obj-pc/zipdbg.o obj-pc/ttybus.o obj-pc/llcomms.o obj-pc/regdefs.o obj-pc/byteswap.o obj-pc/zopcodes.o obj-pc/twoc.o -lcurses -o zipdbg
Building dependency file(s)
zip-gcc -O3 -I. -I../../rtl -c udiv.c -o obj-zip/udiv.o
zip-gcc -O3 -I. -I../../rtl -c umod.c -o obj-zip/umod.o
zip-gcc -O3 -I. -I../../rtl -c syscalls.c -o obj-zip/syscalls.o
zip-gcc -O3 -I. -I../../rtl -ffreestanding -c crt0.c -o obj-zip/crt0.o
zip-ar -cru libzbasic.a obj-zip/udiv.o obj-zip/umod.o obj-zip/syscalls.o obj-zip/crt0.o
Building dependency file(s)
zip-gcc -O3 -c hello.c -o obj-zip/hello.o
make[1]: *** No rule to make target '/home/dan/work/rnd/zipcpu/sw/install/cross-tools/zip/lib/libg.a', needed by 'hello'. Stop.
make: *** [Makefile:182: sw-board] Error 2

zbasic make error

Using Ubuntu 20.04 LTS on Ryzen 1600 with 8GB ram, Path=usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/home/ken/zipcpu/sw/install/cross-tools/bin
I get the following errors trying to build zbasic after cloning:
ar --transform s,^,date +%Y%m%d-zbasic/, -chjf date +%Y%m%d-zbasic.tjz find sw -name "*.cpp" find sw -name "*.c" find sw -name "*.h" find sw -name "*.sh" find sw -name "*.py" find sw -name "*.pl" find sw -name "*.png" find sw -name Makefile find rtl -name "*.v" find rtl -name Makefile find sim -name Makefile find sim -name "*.cpp" find sim -name "*.h" find sim -name "*.c" find . -name "*.txt" find . -name "*.html" find . -name "*.xdc" find auto-data -name "*.txt" README.md
verilator -Wall -Wno-TIMESCALEMOD --MMD -O3 --trace -Mdir ./obj_dir -y wbuart -y wbubus -y cpu -y rtc -y sdspi -cc main.v
%Error: Unknown warning specified: -Wno-TIMESCALEMOD
make[1]: *** [Makefile:77: obj_dir/Vmain.h] Error 1
make: *** [Makefile:140: verilated] Error 2

I am getting error while excuting make in zbasic

Hi,
i am getting following warnings and error while executing make in zbasic directory, please help me on this.

tar --transform s,^,`date +%Y%m%d`-zbasic/, -chjf `date +%Y%m%d`-zbasic.tjz  `find sw -name "*.cpp"` `find sw -name "*.c"` `find sw -name "*.h"`        `find sw -name "*.sh"` `find sw -name "*.py"`   `find sw -name "*.pl"` `find sw -name "*.png"`  `find sw -name Makefile` `find rtl -name "*.v"` `find rtl -name Makefile` `find sim -name Makefile` `find sim -name "*.cpp"` `find sim -name "*.h"` `find sim -name "*.c"` `find . -name "*.txt"` `find . -name "*.html"`   `find . -name "*.xdc"` `find auto-data -name "*.txt"` README.md
verilator -Wall -Wno-lint --MMD -O3 --trace -Mdir ./obj_dir -y cpu -y wbubus -y sdspi -y rtc -y wbuart -cc main.v
make --no-print-directory -C obj_dir -f Vmain.mk
/usr/bin/perl /usr/local/share/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vmain.cpp > Vmain__ALLcls.cpp
g++  -I.  -MMD -I/usr/local/share/verilator/include -I/usr/local/share/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -c -o Vmain__ALLcls.o Vmain__ALLcls.cpp
/usr/bin/perl /usr/local/share/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vmain__Dpi.cpp Vmain__Trace.cpp Vmain__Syms.cpp Vmain__Trace__Slow.cpp > Vmain__ALLsup.cpp
g++  -I.  -MMD -I/usr/local/share/verilator/include -I/usr/local/share/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -c -o Vmain__ALLsup.o Vmain__ALLsup.cpp
      Archiving Vmain__ALL.a ...
ar r Vmain__ALL.a Vmain__ALLcls.o Vmain__ALLsup.o
ranlib Vmain__ALL.a
Building dependency file
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/local/share/verilator/include -I/usr/local/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR -I../../sw/host -I../../rtl -I/usr/local/share/verilator/include -I/usr/local/share/verilator/include/vltstd -I../../rtl/obj_dir -c main_tb.cpp -o obj-pc/main_tb.o
In file included from main_tb.cpp:61:
flashsim.h: In member function ‘bool FLASHSIM::write_in_progress()’:
flashsim.h:114:66: warning: bitwise comparison always evaluates to true [-Wtautological-compare]
  114 |  bool write_in_progress(void) { return ((m_sreg | QSPIF_WIP_FLAG)!=0); }
      |                                         ~~~~~~~~~~~~~~~~~~~~~~~~~^~~
In file included from main_tb.cpp:55:
testb.h: In instantiation of ‘TESTB<VA>::TESTB() [with VA = Vmain]’:
main_tb.cpp:174:15:   required from here
testb.h:80:12: warning: ‘new’ of type ‘Vmain’ with extended alignment 128 [-Waligned-new=]
   80 |   m_core = new VA;
      |            ^~~~~~
testb.h:80:12: note: uses ‘void* operator new(std::size_t)’, which does not have an alignment parameter
testb.h:80:12: note: use ‘-faligned-new’ to enable C++17 over-aligned new support
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/local/share/verilator/include -I/usr/local/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR -I../../sw/host -I../../rtl -I/usr/local/share/verilator/include -I/usr/local/share/verilator/include/vltstd -I../../rtl/obj_dir -c automaster_tb.cpp -o obj-pc/automaster_tb.o
In file included from main_tb.cpp:61,
                 from automaster_tb.cpp:56:
flashsim.h: In member function ‘bool FLASHSIM::write_in_progress()’:
flashsim.h:114:66: warning: bitwise comparison always evaluates to true [-Wtautological-compare]
  114 |  bool write_in_progress(void) { return ((m_sreg | QSPIF_WIP_FLAG)!=0); }
      |                                         ~~~~~~~~~~~~~~~~~~~~~~~~~^~~
In file included from automaster_tb.cpp:51:
testb.h: In instantiation of ‘TESTB<VA>::TESTB() [with VA = Vmain]’:
main_tb.cpp:174:15:   required from here
testb.h:80:12: warning: ‘new’ of type ‘Vmain’ with extended alignment 128 [-Waligned-new=]
   80 |   m_core = new VA;
      |            ^~~~~~
testb.h:80:12: note: uses ‘void* operator new(std::size_t)’, which does not have an alignment parameter
testb.h:80:12: note: use ‘-faligned-new’ to enable C++17 over-aligned new support
g++ -I../../sw/host -I../../rtl -I/usr/local/share/verilator/include -I/usr/local/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR obj-pc/main_tb.o obj-pc/automaster_tb.o obj-pc/flashsim.o obj-pc/sdspisim.o obj-pc/dbluartsim.o obj-pc/zipelf.o obj-pc/byteswap.o obj-pc/verilated.o obj-pc/verilated_vcd_c.o ../../rtl/obj_dir/Vmain__ALL.a ../../rtl/obj_dir/Vmain__ALL.a -lelf -o main_tb
make --no-print-directory -C sw/host
g++ -g -Wall -I. -I../../rtl -c zipload.cpp -o obj-pc/zipload.o
g++ -g -Wall -I. -I../../rtl -c flashdrvr.cpp -o obj-pc/flashdrvr.o
g++ -g obj-pc/zipload.o obj-pc/flashdrvr.o obj-pc/ttybus.o obj-pc/llcomms.o obj-pc/regdefs.o obj-pc/byteswap.o obj-pc/zipelf.o -lelf -o zipload
zip-gcc -O3 -I. -I../../rtl -c syscalls.c -o obj-zip/syscalls.o
zip-gcc -O3 -I. -I../../rtl -ffreestanding -c crt0.c -o obj-zip/crt0.o
zip-ar -cru libzbasic.a obj-zip/udiv.o obj-zip/umod.o obj-zip/syscalls.o obj-zip/crt0.o
zip-gcc -O3 -I../zlib -I../../rtl -T board.ld -L../zlib obj-zip/hello.o -lc -lzbasic -lgcc -o hello
zip-gcc -O3 -I../zlib -I../../rtl -c sdtest.c -o obj-zip/sdtest.o
zip-gcc -O3 -I../zlib -I../../rtl -T board.ld -L../zlib obj-zip/sdtest.o -lc -lzbasic -lgcc -o sdtest
zip-gcc -O3 -I../zlib -I../../rtl -T board.ld -L../zlib obj-zip/cputestcis.o -lc -lzbasic -lgcc -o cputest
obj-zip/cputestcis.o: In function `save_context':
cputest.c:(.text+0x19d8): undefined reference to `zip_save_context'
collect2: error: ld returned 1 exit status
make[1]: *** [Makefile:99: cputest] Error 1
make: *** [Makefile:182: sw-board] Error 2

Need -lgcc for tttt build

Hi,
I am following http://zipcpu.com/zipcpu/2018/02/12/zbasic-intro.html and I got this trying to build tttt:

[ubuntu 13:45] /media/psf/Home/projects/zbasic/sw/board >make tttt
CROSS=zip- ARCH=zip make --no-print-directory -C tttt/src ARCH=zip CROSS=zip- zip-tttt
Building dependency file
zip-gcc -T../../../zlib/../board/board.ld obj-zip/comborow.o obj-zip/comboset.o obj-zip/gboard.o obj-zip/strategy.o obj-zip/vset.o obj-zip/main.o -L../../../zlib -Wl,--start-group -Wl,--Map=zip-tttt.map -lzbasic -lc -lg -o zip-tttt
/media/psf/Home/projects/zipcpu/sw/install/cross-tools/lib/gcc/zip/6.2.0/../../../../zip/lib/libc.a(lib_a-vfprintf.o): In function `_vfprintf_r':
vfprintf.c:(.text+0x648): undefined reference to `__unorddf2'
vfprintf.c:(.text+0x664): undefined reference to `__ledf2'
vfprintf.c:(.text+0x7f8): undefined reference to `__eqdf2'
vfprintf.c:(.text+0x1470): undefined reference to `__eqdf2'
vfprintf.c:(.text+0x1b1c): undefined reference to `__nedf2'
vfprintf.c:(.text+0x1f28): undefined reference to `__unorddf2'
vfprintf.c:(.text+0x1f48): undefined reference to `__ltdf2'
vfprintf.c:(.text+0x2004): undefined reference to `__nedf2'
/media/psf/Home/projects/zipcpu/sw/install/cross-tools/lib/gcc/zip/6.2.0/../../../../zip/lib/libc.a(lib_a-dtoa.o): In function `_dtoa_r':
dtoa.c:(.text+0x2c4): undefined reference to `__eqdf2'
dtoa.c:(.text+0x3a0): undefined reference to `__floatunsidf'
dtoa.c:(.text+0x3c0): undefined reference to `__subdf3'
dtoa.c:(.text+0x3d8): undefined reference to `__muldf3'
dtoa.c:(.text+0x3f0): undefined reference to `__adddf3'
dtoa.c:(.text+0x400): undefined reference to `__floatsidf'
<snip>

I found it necessary to add -lgcc to the XLIBS line.

Makefile:82: recipe for target 'obj_dir/Vmain.h' failed

I am still very new to FPGAs and your AutoMake powered designs in special. So, please bear with me.

When I clone and build this repo, following your instructions given here (http://zipcpu.com/zipcpu/2018/02/12/zbasic-intro.html), having completed successfully the ZipCPU tutorial before (http://zipcpu.com/zipcpu/2018/01/31/cpu-build.html), I get errors during 'make':

$ make
tar --transform s,^,`date +%Y%m%d`-zbasic/, -chjf `date +%Y%m%d`-zbasic.tjz  `find sw -name "*.cpp"` `find sw -name "*.c"` `find sw -name "*.h"`        `find sw -name "*.sh"` `find sw -name "*.py"`        `find sw -name "*.pl"` `find sw -name "*.png"`  `find sw -name Makefile` `find rtl -name "*.v"` `find rtl -name Makefile` `find sim -name Makefile` `find sim -name "*.cpp"` `find sim -name "*.h"` `find sim -name "*.c"` `find . -name "*.txt"` `find . -name "*.html"`   `find . -name "*.xdc"` `find auto-data -name "*.txt"` README.md
verilator -Wall --MMD -O3 --trace -Mdir ./obj_dir -y cpu -cc main.v
%Warning-UNUSED: cpu/dcache.v:198: Signal is not driven, nor used: gie
%Warning-UNUSED: Use "/* verilator lint_off UNUSED */" and lint_on around source to disable this message.
%Error: Exiting due to 1 warning(s)
%Error: Command Failed /usr/bin/verilator_bin -Wall --MMD -O3 --trace -Mdir ./obj_dir -y cpu -cc main.v
Makefile:82: recipe for target 'obj_dir/Vmain.h' failed
make[1]: *** [obj_dir/Vmain.h] Error 10
Makefile:140: recipe for target 'verilated' failed
make: *** [verilated] Error 2

Interestingly, if I repeat the 'make' command, it completes without error:

$ make
tar --transform s,^,`date +%Y%m%d`-zbasic/, -chjf `date +%Y%m%d`-zbasic.tjz  `find sw -name "*.cpp"` `find sw -name "*.c"` `find sw -name "*.h"`        `find sw -name "*.sh"` `find sw -name "*.py"`        `find sw -name "*.pl"` `find sw -name "*.png"`  `find sw -name Makefile` `find rtl -name "*.v"` `find rtl -name Makefile` `find sim -name Makefile` `find sim -name "*.cpp"` `find sim -name "*.h"` `find sim -name "*.c"` `find . -name "*.txt"` `find . -name "*.html"`   `find . -name "*.xdc"` `find auto-data -name "*.txt"` README.md
make --no-print-directory -C obj_dir -f Vmain.mk
/usr/bin/perl /usr/share/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vmain.cpp > Vmain__ALLcls.cpp
g++  -I.  -MMD -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -c -o Vmain__ALLcls.o Vmain__ALLcls.cpp
/usr/bin/perl /usr/share/verilator/bin/verilator_includer -DVL_INCLUDE_OPT=include Vmain__Dpi.cpp Vmain__Trace.cpp Vmain__Syms.cpp Vmain__Trace__Slow.cpp > Vmain__ALLsup.cpp
g++  -I.  -MMD -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -DVL_PRINTF=printf -DVM_COVERAGE=0 -DVM_SC=0 -DVM_TRACE=1 -faligned-new -Wno-sign-compare -Wno-uninitialized -Wno-unused-but-set-variable -Wno-unused-parameter -Wno-unused-variable -Wno-shadow       -c -o Vmain__ALLsup.o Vmain__ALLsup.cpp
      Archiving Vmain__ALL.a ...
ar r Vmain__ALL.a Vmain__ALLcls.o Vmain__ALLsup.o
ar: Erzeugen von Vmain__ALL.a
ranlib Vmain__ALL.a
Building cpudefs.h
Building design.h
Building dependency file
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -c main_tb.cpp -o obj-pc/main_tb.o
In file included from main_tb.cpp:56:0:
testb.h: In instantiation of ‘TESTB<VA>::TESTB() [with VA = Vmain]’:
main_tb.cpp:177:15:   required from here
testb.h:58:12: warning: ‘new’ of type ‘Vmain’ with extended alignment 128 [-Waligned-new=]
   m_core = new VA;
            ^~~~~~
testb.h:58:12: note: uses ‘void* operator new(std::size_t)’, which does not have an alignment parameter
testb.h:58:12: note: use ‘-faligned-new’ to enable C++17 over-aligned new support
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -c automaster_tb.cpp -o obj-pc/automaster_tb.o
In file included from automaster_tb.cpp:51:0:
testb.h: In instantiation of ‘TESTB<VA>::TESTB() [with VA = Vmain]’:
main_tb.cpp:177:15:   required from here
testb.h:58:12: warning: ‘new’ of type ‘Vmain’ with extended alignment 128 [-Waligned-new=]
   m_core = new VA;
            ^~~~~~
testb.h:58:12: note: uses ‘void* operator new(std::size_t)’, which does not have an alignment parameter
testb.h:58:12: note: use ‘-faligned-new’ to enable C++17 over-aligned new support
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -c flashsim.cpp -o obj-pc/flashsim.o
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -c sdspisim.cpp -o obj-pc/sdspisim.o
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -c dbluartsim.cpp -o obj-pc/dbluartsim.o
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -c zipelf.cpp -o obj-pc/zipelf.o
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -c byteswap.cpp -o obj-pc/byteswap.o
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -c /usr/share/verilator/include/verilated.cpp -o obj-pc/verilated.o
g++ -Og -g -Wall -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -c /usr/share/verilator/include/verilated_vcd_c.cpp -o obj-pc/verilated_vcd_c.o
g++ -I../../sw/host -I../../rtl -I/usr/share/verilator/include -I/usr/share/verilator/include/vltstd -I../../rtl/obj_dir -DNEW_VERILATOR obj-pc/main_tb.o obj-pc/automaster_tb.o obj-pc/flashsim.o obj-pc/sdspisim.o obj-pc/dbluartsim.o obj-pc/zipelf.o obj-pc/byteswap.o obj-pc/verilated.o obj-pc/verilated_vcd_c.o ../../rtl/obj_dir/Vmain__ALL.a ../../rtl/obj_dir/Vmain__ALL.a -lelf -o main_tb
make --no-print-directory -C sw/host
g++ -g -Wall -I. -I../../rtl -c zipload.cpp -o obj-pc/zipload.o
In file included from zipload.cpp:55:0:
ttybus.h: In destructor ‘virtual TTYBUS::~TTYBUS()’:
ttybus.h:110:3: warning: this ‘if’ clause does not guard... [-Wmisleading-indentation]
   if (m_buf) delete[] m_buf; m_buf = NULL;
   ^~
ttybus.h:110:30: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’
   if (m_buf) delete[] m_buf; m_buf = NULL;
                              ^~~~~
g++ -g obj-pc/zipload.o obj-pc/flashdrvr.o obj-pc/ttybus.o obj-pc/llcomms.o obj-pc/regdefs.o obj-pc/byteswap.o obj-pc/zipelf.o -lelf -o zipload
Building dependency file(s)
zip-gcc -O3 -I. -I../../rtl -c udiv.c -o obj-zip/udiv.o
zip-gcc -O3 -I. -I../../rtl -c umod.c -o obj-zip/umod.o
zip-gcc -O3 -I. -I../../rtl -c syscalls.c -o obj-zip/syscalls.o
zip-gcc -O3 -I. -I../../rtl -ffreestanding -c crt0.c -o obj-zip/crt0.o
zip-ar -cru libzbasic.a obj-zip/udiv.o obj-zip/umod.o obj-zip/syscalls.o obj-zip/crt0.o
Building dependency file(s)
zip-gcc -O3 -c hello.c -o obj-zip/hello.o
zip-gcc -O3 -I../zlib -I../../rtl -T board.ld -L../zlib obj-zip/hello.o -lc -lzbasic -lgcc -o hello
zip-gcc -O3 -I../zlib -I../../rtl -c sdtest.c -o obj-zip/sdtest.o
zip-gcc -O3 -I../zlib -I../../rtl -T board.ld -L../zlib obj-zip/sdtest.o -lc -lzbasic -lgcc -o sdtest
zip-gcc -O3 -I../zlib -I../../rtl -c -Wa,-nocis -fno-builtin cputest.c -o obj-zip/cputest.o
zip-gcc -O3 -I../zlib -I../../rtl -T board.ld -L../zlib obj-zip/cputest.o -lc -lzbasic -lgcc -o cputest
zip-gcc -O3 -I../zlib -I../../rtl -c gpiotoggle.c -o obj-zip/gpiotoggle.o
zip-gcc -O3 -I../zlib -I../../rtl -T board.ld -L../zlib obj-zip/gpiotoggle.o -lc -lzbasic -lgcc -o gpiotoggle

Not sure, if that means, make is working correctly or if the error is just neglected. Anyway, the following telnet test does not work. Output on the 'telnet localhost 8846' side is:

$ telnet localhost 8846
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.

On the 'main_tb' side:

$ ./main_tb ../../sw/board/cputest
Listening on port 8845
Listening on port 8846
Attempting to start from 0x01400000
Accepted CON connection
> 0
> 0
> 0
> 0
> 0

Until I stop the testbench.

What am I doing wrong?

Thanks!

thanks for help

I am taking zipCPU as an example to learn how to make Verilator used in my project.

From testb.cpp, I noticed you are use one extra eval() before posedge clock:

            // Pre-evaluate, to give verilator a chance
	// to settle any combinatorial logic that
	// that may have changed since the last clock
	// evaluation, and then record that in the
	// trace.
	eval();

But if this is a synchronous design, should the eval() following clock wagging updated the comb logic also? To add one more eval() here might also slow down the run time performance?

Many thanks,

Verilator error while running make in rtl directory

I was getting an error while running the verilator by the make that -Wno-TIMESCALEMOD is not a valid attribute.
So I changed it to -Wno-lint,
So the Makefile in RTL line number 53 was changed from
VFLAGS = -Wall -Wno-TIMESCALEMOD --MMD -O3 --trace -Mdir $(VDIRFB) $(AUTOVDIRS) -cc
to
VFLAGS = -Wall -Wno-lint --MMD -O3 --trace -Mdir $(VDIRFB) $(AUTOVDIRS) -cc

After this change make completed successfully in the RTL directory

So is this OK??