Topic: synopsys Goto Github
Some thing interesting about synopsys
Some thing interesting about synopsys
synopsys,Multi-Voltage and Multi-Threshold Low Power Design Techniques for ORCA Processor Based on 32 nm Technology
User: abdelazeem201
synopsys,Master degree project for Synthesis and Optimization of Digital Systems
User: andrea4g
synopsys,This is a tutorial on standard digital design flow
User: bojackchen
synopsys,Technology file parser in Rust
User: erihsu
synopsys,2AMD15 - Big Data Management - Prof. Papapetrou - TU/e
User: filippodaniotti
synopsys,embARC Open Software Platform (OSP) - An embedded software distribution for IoT and other embedded applications for ARC
Organization: foss-for-synopsys-dwc-arc-processors
Home Page: https://www.embarc.org/
synopsys,Fully pipelined DLX Microprocessor optimized for energy efficiency and testing purposes developed in VHDL. Simulation with Intel® ModelSim®, synthesis under Synopsys® DC Ultra™, and physical layout using Cadence® Innovus™ Implementation System.
User: gabrielganzer
synopsys,Post-synthesis power optimization via dual-Vth cell assignment and gate re-sizing. Scripting in TCL with custom commands written for Synopsys® PrimeTime® and DC Ultra™.
User: gabrielganzer
synopsys,Designing a Pseudo dynamic latched comparator in 28nm CMOS Technology using Synopsys Tools.
User: jitendrasb24
synopsys,Customized UVM Report Server
User: kaushalmodi
synopsys,This repository contains my BSc graduation project at the Faculty of Engineering, Ain Shams University. The project focuses on implementing the RISC-V core, specifically the CV32E40 ,with a focus on achieving high performance and maximizing frequency through synthesis, place and route (PNR).
User: kholoud0
synopsys,A small collection of tutorials and tools for ASIC design.
User: kkiningh
synopsys,Example of a full DC synthesis script for a simple design
User: kkiningh
synopsys,[WIP] Dockerize Synopsys/Cadence EDA tools
User: limerainne
synopsys,:star2: Jasmine "lnishan" Chen's Curriculum Vitae (CV) in Markdown
User: lnishan
Home Page: https://lnishan.github.io/Curriculum-Vitae/
synopsys,Optimisation procedure written in tcl for (Area, Delay, Power) with the usage of Dual-Vth CMOS technology within Synopsys DC and PT
User: luca-dalmasso
synopsys,Waveform viewer for Synopsys CustomCompiler, text table format, simulation data
User: mdvico
synopsys,A deep learning based bioinformatics project on epigenetics in Type 2 Diabetes.
User: minhoolee
synopsys,There is segmentation fault of VCS which should be fixed.
User: mperov
synopsys,Typical project for Synopsys DC Compiler
User: parthpower
synopsys,Ansible Role: Polaris - Installs and configures Polaris CLI
User: shenxianpeng
Home Page: https://galaxy.ansible.com/shenxianpeng/polaris
synopsys,Implementation of a MIPS CPU using Verilog.
User: shivamkundan
synopsys,2 bit random number generation under data encryption using Synopsys Custom Compiler in 32nm CMOS Technology
User: sidhantp1906
synopsys,Command completion for Synopsys (Black Duck) Detect commands
User: thaljef
Home Page: https://synopsys.atlassian.net/wiki/spaces/INTDOCS/pages/62423113/Synopsys+Detect
synopsys,DLX microprocessor described in VHDL for the Microelectronic Systems course @ Politecnico di Torino
User: vincenzo-petrolo
synopsys,Designing JK Flip-Flop CMOS using Synopsys Custom Compiler.
User: xevozen
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